Fix AY VGM output, Fix presets

This commit is contained in:
cam900 2022-05-15 00:58:00 +09:00
parent 8e50ad8c90
commit f62f6ed77b
2 changed files with 35 additions and 3 deletions

View file

@ -906,11 +906,41 @@ SafeWriter* DivEngine::saveVGM(bool* sysToExport, bool loop, int version) {
} }
break; break;
case DIV_SYSTEM_AY8910: case DIV_SYSTEM_AY8910:
case DIV_SYSTEM_AY8930: case DIV_SYSTEM_AY8930: {
if (!hasAY) { if (!hasAY) {
bool hasClockDivider=false; // Configurable clock divider
bool hasStereo=true; // Stereo
hasAY=disCont[i].dispatch->chipClock; hasAY=disCont[i].dispatch->chipClock;
ayConfig=(song.system[i]==DIV_SYSTEM_AY8930)?3:0;
ayFlags=1; ayFlags=1;
if (song.system[i]==DIV_SYSTEM_AY8930) { // AY8930
ayConfig=0x03;
hasClockDivider=true;
} else {
switch ((song.systemFlags[i]>>4)&3) {
default:
case 0: // AY8910
ayConfig=0x00;
break;
case 1: // YM2149
ayConfig=0x10;
hasClockDivider=true;
break;
case 2: // Sunsoft 5B
ayConfig=0x10;
ayFlags|=0x12; // Clock internally divided, Single sound output
hasStereo=false; // due to above, can't be per-channel stereo configurable
break;
case 3: // AY8914
ayConfig=0x04;
break;
}
}
if (hasClockDivider && ((song.systemFlags[i]>>7)&1)) {
ayFlags|=0x10;
}
if (hasStereo && ((song.systemFlags[i]>>6)&1)) {
ayFlags|=0x80;
}
willExport[i]=true; willExport[i]=true;
} else if (!(hasAY&0x40000000)) { } else if (!(hasAY&0x40000000)) {
isSecond[i]=true; isSecond[i]=true;
@ -919,6 +949,7 @@ SafeWriter* DivEngine::saveVGM(bool* sysToExport, bool loop, int version) {
howManyChips++; howManyChips++;
} }
break; break;
}
case DIV_SYSTEM_SAA1099: case DIV_SYSTEM_SAA1099:
if (!hasSAA) { if (!hasSAA) {
hasSAA=disCont[i].dispatch->chipClock; hasSAA=disCont[i].dispatch->chipClock;

View file

@ -647,11 +647,12 @@ void FurnaceGUI::initSystemPresets() {
"MSX + Darky", { "MSX + Darky", {
DIV_SYSTEM_AY8910, 64, 0, 16, DIV_SYSTEM_AY8910, 64, 0, 16,
DIV_SYSTEM_AY8930, 64, 0, 139, // 3.58MHz DIV_SYSTEM_AY8930, 64, 0, 139, // 3.58MHz
DIV_SYSTEM_AY8930, 64, 0, 140, // 3.58MHz or 3.6MHz selectable via register DIV_SYSTEM_AY8930, 64, 0, 139, // 3.58MHz or 3.6MHz selectable via register
// per-channel mixer (soft panning, post processing) isn't emulated at all // per-channel mixer (soft panning, post processing) isn't emulated at all
0 0
} }
)); ));
cat.systems.push_back(FurnaceGUISysDef(
"MSX + SCC", { "MSX + SCC", {
DIV_SYSTEM_AY8910, 64, 0, 16, DIV_SYSTEM_AY8910, 64, 0, 16,
DIV_SYSTEM_SCC, 64, 0, 0, DIV_SYSTEM_SCC, 64, 0, 0,