From f62f6ed77bbef759cc2cc4ecb28863b97b7e3134 Mon Sep 17 00:00:00 2001 From: cam900 Date: Sun, 15 May 2022 00:58:00 +0900 Subject: [PATCH] Fix AY VGM output, Fix presets --- src/engine/vgmOps.cpp | 35 +++++++++++++++++++++++++++++++++-- src/gui/presets.cpp | 3 ++- 2 files changed, 35 insertions(+), 3 deletions(-) diff --git a/src/engine/vgmOps.cpp b/src/engine/vgmOps.cpp index 53eddc1b2..2916c1034 100644 --- a/src/engine/vgmOps.cpp +++ b/src/engine/vgmOps.cpp @@ -906,11 +906,41 @@ SafeWriter* DivEngine::saveVGM(bool* sysToExport, bool loop, int version) { } break; case DIV_SYSTEM_AY8910: - case DIV_SYSTEM_AY8930: + case DIV_SYSTEM_AY8930: { if (!hasAY) { + bool hasClockDivider=false; // Configurable clock divider + bool hasStereo=true; // Stereo hasAY=disCont[i].dispatch->chipClock; - ayConfig=(song.system[i]==DIV_SYSTEM_AY8930)?3:0; ayFlags=1; + if (song.system[i]==DIV_SYSTEM_AY8930) { // AY8930 + ayConfig=0x03; + hasClockDivider=true; + } else { + switch ((song.systemFlags[i]>>4)&3) { + default: + case 0: // AY8910 + ayConfig=0x00; + break; + case 1: // YM2149 + ayConfig=0x10; + hasClockDivider=true; + break; + case 2: // Sunsoft 5B + ayConfig=0x10; + ayFlags|=0x12; // Clock internally divided, Single sound output + hasStereo=false; // due to above, can't be per-channel stereo configurable + break; + case 3: // AY8914 + ayConfig=0x04; + break; + } + } + if (hasClockDivider && ((song.systemFlags[i]>>7)&1)) { + ayFlags|=0x10; + } + if (hasStereo && ((song.systemFlags[i]>>6)&1)) { + ayFlags|=0x80; + } willExport[i]=true; } else if (!(hasAY&0x40000000)) { isSecond[i]=true; @@ -919,6 +949,7 @@ SafeWriter* DivEngine::saveVGM(bool* sysToExport, bool loop, int version) { howManyChips++; } break; + } case DIV_SYSTEM_SAA1099: if (!hasSAA) { hasSAA=disCont[i].dispatch->chipClock; diff --git a/src/gui/presets.cpp b/src/gui/presets.cpp index 021f13480..d04d329d7 100644 --- a/src/gui/presets.cpp +++ b/src/gui/presets.cpp @@ -647,11 +647,12 @@ void FurnaceGUI::initSystemPresets() { "MSX + Darky", { DIV_SYSTEM_AY8910, 64, 0, 16, DIV_SYSTEM_AY8930, 64, 0, 139, // 3.58MHz - DIV_SYSTEM_AY8930, 64, 0, 140, // 3.58MHz or 3.6MHz selectable via register + DIV_SYSTEM_AY8930, 64, 0, 139, // 3.58MHz or 3.6MHz selectable via register // per-channel mixer (soft panning, post processing) isn't emulated at all 0 } )); + cat.systems.push_back(FurnaceGUISysDef( "MSX + SCC", { DIV_SYSTEM_AY8910, 64, 0, 16, DIV_SYSTEM_SCC, 64, 0, 0,