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add a define for SN noise start value

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some SN chips have the start value set to an Atari-like one
This commit is contained in:
tildearrow 2021-05-26 02:09:18 -05:00
parent 6c7383f39b
commit b499878c24
1 changed files with 5 additions and 3 deletions
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8
src/engine/platform/sound/sn76496.cpp
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@ -144,6 +144,8 @@
#define MAX_OUTPUT 0x7fff #define MAX_OUTPUT 0x7fff
#define NOISE_START 0x8000
//#define NOISE_START 0x0f35
sn76496_base_device::sn76496_base_device( sn76496_base_device::sn76496_base_device(
const char *tag, const char *tag,
@ -193,7 +195,7 @@ void sn76496_base_device::device_start()
m_count[i] = 0; m_count[i] = 0;
} }
m_RNG = m_feedback_mask; m_RNG = NOISE_START;
m_output[3] = m_RNG & 1; m_output[3] = m_RNG & 1;
m_current_clock = m_clock_divider-1; m_current_clock = m_clock_divider-1;
@ -230,7 +232,7 @@ void sn76496_base_device::write(u8 data)
{ {
r = (data & 0x70) >> 4; r = (data & 0x70) >> 4;
m_last_register = r; m_last_register = r;
if (((m_ncr_style_psg) && (r == 6)) && ((data&0x04) != (m_register[6]&0x04))) m_RNG = m_feedback_mask; // NCR-style PSG resets the LFSR only on a mode write which actually changes the state of bit 2 of register 6 if (((m_ncr_style_psg) && (r == 6)) && ((data&0x04) != (m_register[6]&0x04))) m_RNG = NOISE_START; // NCR-style PSG resets the LFSR only on a mode write which actually changes the state of bit 2 of register 6
m_register[r] = (m_register[r] & 0x3f0) | (data & 0x0f); m_register[r] = (m_register[r] & 0x3f0) | (data & 0x0f);
} }
else else
@ -269,7 +271,7 @@ void sn76496_base_device::write(u8 data)
n = m_register[6]; n = m_register[6];
// N/512,N/1024,N/2048,Tone #3 output // N/512,N/1024,N/2048,Tone #3 output
m_period[3] = ((n&3) == 3)? (m_period[2]<<1) : (1 << (5+(n&3))); m_period[3] = ((n&3) == 3)? (m_period[2]<<1) : (1 << (5+(n&3)));
if (!(m_ncr_style_psg)) m_RNG = m_feedback_mask; if (!(m_ncr_style_psg)) m_RNG = NOISE_START;
} }
break; break;
} }