176 lines
11 KiB
PHP
176 lines
11 KiB
PHP
; OPM v0 stream data, stream-independent commands
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OPM_STREAM_END_FRAME equ 0xFF ; end of frame, next channel
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OPM_STREAM_END equ 0xFE ; end of stream, stop here or loop to OPM_STREAM_LOOP stream point
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OPM_STREAM_NOP equ 0xFD ; nop
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OPM_STREAM_NEW_ORDER equ 0xFC ; nop, marks new order
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OPM_STREAM_SET_FRAME_RATE equ 0xFB ; word rate (as in opm_header_t::frame_rate)
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OPM_STREAM_LOOP equ 0xFA ; set loop point here
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; delay commands
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OPM_STREAM_DELAY_INT32 equ 0xF9 ; dword delay
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OPM_STREAM_DELAY_INT16 equ 0xF8 ; word delay
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OPM_STREAM_DELAY_INT12 equ 0xD0 ; D0..DF - 0..4095 frames delay (hibyte in low 4 bits of command)
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OPM_STREAM_DELAY_SHORT equ 0xC0 ; C0..CF - 1..16 frames delay
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; back reference
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OPM_STREAM_BACKREF equ 0xE0 ; E0..EF - word backrefpos (12 bit), byte frames
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; OPN control stream commands
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OPM_CTRL_EXTCH3 equ 0x00 ; 00..7F - ext. CH3 op1-3 frequency
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OPM_CTRL_TIMER_CSM equ 0x80 ; 80..9F - set timer/CSM/LFO frequency
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OPM_CTRL_RHYTHM equ 0xA0 ; A0..BF - rhythm control
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OPM_CTRL_CMD80_REG25 equ (1 << 0) ;
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OPM_CTRL_CMD80_REG25_BIT equ 0 ; shift value for OPM_CTRL_CMD80_REG25
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OPM_CTRL_CMD80_REG24 equ (1 << 1) ;
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OPM_CTRL_CMD80_REG24_BIT equ 1 ; shift value for OPM_CTRL_CMD80_REG24
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OPM_CTRL_CMD80_REG27 equ (1 << 2) ;
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OPM_CTRL_CMD80_REG27_BIT equ 2 ; shift value for OPM_CTRL_CMD80_REG27
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OPM_CTRL_CMD80_REG22 equ (1 << 3) ;
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OPM_CTRL_CMD80_REG22_BIT equ 3 ; shift value for OPM_CTRL_CMD80_REG22
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OPM_CTRL_CMD80_EOF equ (1 << 4) ;
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OPM_CTRL_CMD80_EOF_BIT equ 4 ; shift value for OPM_CTRL_CMD80_EOF
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OPM_CTRL_EXTCH3_OP1_HIGH equ (1 << 0) ;
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OPM_CTRL_EXTCH3_OP1_HIGH_BIT equ 0 ; shift value for OPM_CTRL_EXTCH3_OP1_HIGH
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OPM_CTRL_EXTCH3_OP1_LOW equ (1 << 1) ;
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OPM_CTRL_EXTCH3_OP1_LOW_BIT equ 1 ; shift value for OPM_CTRL_EXTCH3_OP1_LOW
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OPM_CTRL_EXTCH3_OP2_HIGH equ (1 << 2) ;
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OPM_CTRL_EXTCH3_OP2_HIGH_BIT equ 2 ; shift value for OPM_CTRL_EXTCH3_OP2_HIGH
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OPM_CTRL_EXTCH3_OP2_LOW equ (1 << 3) ;
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OPM_CTRL_EXTCH3_OP2_LOW_BIT equ 3 ; shift value for OPM_CTRL_EXTCH3_OP2_LOW
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OPM_CTRL_EXTCH3_OP3_HIGH equ (1 << 4) ;
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OPM_CTRL_EXTCH3_OP3_HIGH_BIT equ 4 ; shift value for OPM_CTRL_EXTCH3_OP3_HIGH
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OPM_CTRL_EXTCH3_OP3_LOW equ (1 << 5) ;
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OPM_CTRL_EXTCH3_OP3_LOW_BIT equ 5 ; shift value for OPM_CTRL_EXTCH3_OP3_LOW
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OPM_CTRL_EXTCH3_EOF equ (1 << 6) ;
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OPM_CTRL_EXTCH3_EOF_BIT equ 6 ; shift value for OPM_CTRL_EXTCH3_EOF
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OPM_CTRL_CMDA0_REG_MASK equ (0x0F << 0) ;
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OPM_CTRL_CMDA0_REG_MASK_BIT equ 0 ; shift value for OPM_CTRL_CMDA0_REG_MASK
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OPM_CTRL_CMDA0_EOF equ (1 << 4) ;
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OPM_CTRL_CMDA0_EOF_BIT equ 4 ; shift value for OPM_CTRL_CMDA0_EOF
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; OPN FM stream commands
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OPM_FM_ADSR equ 0x00 ; 00..3F - set ADSR
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OPM_FM_MUL_TL_EG equ 0x40 ; 40..7F - set MULT/TL/SSG-EG
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OPM_FM_FREQ_FB_PAN equ 0x80 ; 80..9F - set frequency/feedback/panning
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OPM_FM_KEY equ 0xA0 ; A0..BF - key on/off
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OPM_FM_CMD00_REG50 equ (1 << 0) ;
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OPM_FM_CMD00_REG50_BIT equ 0 ; shift value for OPM_FM_CMD00_REG50
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OPM_FM_CMD00_REG60 equ (1 << 1) ;
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OPM_FM_CMD00_REG60_BIT equ 1 ; shift value for OPM_FM_CMD00_REG60
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OPM_FM_CMD00_REG70 equ (1 << 2) ;
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OPM_FM_CMD00_REG70_BIT equ 2 ; shift value for OPM_FM_CMD00_REG70
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OPM_FM_CMD00_REG80 equ (1 << 3) ;
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OPM_FM_CMD00_REG80_BIT equ 3 ; shift value for OPM_FM_CMD00_REG80
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OPM_FM_CMD00_OP_MASK equ (3 << 4) ;
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OPM_FM_CMD00_OP_MASK_BIT equ 4 ; shift value for OPM_FM_CMD00_OP_MASK
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OPM_FM_CMD40_REG30 equ (1 << 0) ;
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OPM_FM_CMD40_REG30_BIT equ 0 ; shift value for OPM_FM_CMD40_REG30
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OPM_FM_CMD40_REG40 equ (1 << 1) ;
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OPM_FM_CMD40_REG40_BIT equ 1 ; shift value for OPM_FM_CMD40_REG40
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OPM_FM_CMD40_REG90 equ (1 << 2) ;
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OPM_FM_CMD40_REG90_BIT equ 2 ; shift value for OPM_FM_CMD40_REG90
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OPM_FM_CMD40_EOF equ (1 << 3) ;
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OPM_FM_CMD40_EOF_BIT equ 3 ; shift value for OPM_FM_CMD40_EOF
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OPM_FM_CMD40_OP_SHIFT equ 4 ;
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OPM_FM_CMD40_OP_MASK equ (3 << 4) ;
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OPM_FM_CMD40_OP_MASK_BIT equ 4 ; shift value for OPM_FM_CMD40_OP_MASK
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OPM_FM_CMD80_REGA4 equ (1 << 0) ;
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OPM_FM_CMD80_REGA4_BIT equ 0 ; shift value for OPM_FM_CMD80_REGA4
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OPM_FM_CMD80_REGA0 equ (1 << 1) ;
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OPM_FM_CMD80_REGA0_BIT equ 1 ; shift value for OPM_FM_CMD80_REGA0
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OPM_FM_CMD80_REGB0 equ (1 << 2) ;
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OPM_FM_CMD80_REGB0_BIT equ 2 ; shift value for OPM_FM_CMD80_REGB0
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OPM_FM_CMD80_REGB4 equ (1 << 3) ;
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OPM_FM_CMD80_REGB4_BIT equ 3 ; shift value for OPM_FM_CMD80_REGB4
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OPM_FM_CMD80_EOF equ (1 << 4) ;
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OPM_FM_CMD80_EOF_BIT equ 4 ; shift value for OPM_FM_CMD80_EOF
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OPM_FM_CMDA0_OP_SHIFT equ 0 ;
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OPM_FM_CMDA0_OP_MASK equ (0x0F << 0) ;
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OPM_FM_CMDA0_OP_MASK_BIT equ 0 ; shift value for OPM_FM_CMDA0_OP_MASK
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OPM_FM_CMDA0_EOF equ (1 << 4) ;
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OPM_FM_CMDA0_EOF_BIT equ 4 ; shift value for OPM_FM_CMDA0_EOF
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; OPNA rhythm channel stream
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OPN_RHYTHM_KEY equ 0x00 ; 00..7F - key on
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OPN_RHYTHM_REGS1 equ 0x80 ; 80..9F - write reg set 1
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OPN_RHYTHM_REGS2 equ 0xA0 ; A0..BF - write reg set 2
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OPN_RHYTHM_KEY_EOF equ (1 << 6) ;
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OPN_RHYTHM_KEY_EOF_BIT equ 6 ; shift value for OPN_RHYTHM_KEY_EOF
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OPN_RHYTHM_CMD80_REG10 equ (1 << 0) ;
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OPN_RHYTHM_CMD80_REG10_BIT equ 0 ; shift value for OPN_RHYTHM_CMD80_REG10
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OPN_RHYTHM_CMD80_REG11 equ (1 << 1) ;
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OPN_RHYTHM_CMD80_REG11_BIT equ 1 ; shift value for OPN_RHYTHM_CMD80_REG11
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OPN_RHYTHM_CMD80_REG18 equ (1 << 2) ;
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OPN_RHYTHM_CMD80_REG18_BIT equ 2 ; shift value for OPN_RHYTHM_CMD80_REG18
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OPN_RHYTHM_CMD80_REG19 equ (1 << 3) ;
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OPN_RHYTHM_CMD80_REG19_BIT equ 3 ; shift value for OPN_RHYTHM_CMD80_REG19
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OPN_RHYTHM_CMDA0_REG1A equ (1 << 0) ;
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OPN_RHYTHM_CMDA0_REG1A_BIT equ 0 ; shift value for OPN_RHYTHM_CMDA0_REG1A
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OPN_RHYTHM_CMDA0_REG1B equ (1 << 1) ;
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OPN_RHYTHM_CMDA0_REG1B_BIT equ 1 ; shift value for OPN_RHYTHM_CMDA0_REG1B
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OPN_RHYTHM_CMDA0_REG1C equ (1 << 2) ;
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OPN_RHYTHM_CMDA0_REG1C_BIT equ 2 ; shift value for OPN_RHYTHM_CMDA0_REG1C
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OPN_RHYTHM_CMDA0_REG1D equ (1 << 3) ;
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OPN_RHYTHM_CMDA0_REG1D_BIT equ 3 ; shift value for OPN_RHYTHM_CMDA0_REG1D
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OPN_RHYTHM_REGS_EOF equ (1 << 4) ;
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OPN_RHYTHM_REGS_EOF_BIT equ 4 ; shift value for OPN_RHYTHM_REGS_EOF
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; OPN SSG tone stream commands (shared with AY chip type)
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OPM_AYTONE_REGS equ 0x00 ; 00..7F - set volume and period low
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OPM_AYTONE_PERIOD equ 0x80 ; 80..BF - set period
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OPM_AYTONE_MASK equ 0xF0 ; F0..F7 - set tone/noise mask
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OPM_AYTONE_CMD00_VOLUME_MASK equ (0x1F << 0) ;
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OPM_AYTONE_CMD00_VOLUME_MASK_BIT equ 0 ; shift value for OPM_AYTONE_CMD00_VOLUME_MASK
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OPM_AYTONE_CMD00_PERIOD_LOW equ (1 << 5) ;
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OPM_AYTONE_CMD00_PERIOD_LOW_BIT equ 5 ; shift value for OPM_AYTONE_CMD00_PERIOD_LOW
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OPM_AYTONE_CMD00_EOF equ (1 << 6) ;
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OPM_AYTONE_CMD00_EOF_BIT equ 6 ; shift value for OPM_AYTONE_CMD00_EOF
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OPM_AYTONE_CMD80_PERIOD_HIGH equ (0xF << 0) ;
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OPM_AYTONE_CMD80_PERIOD_HIGH_BIT equ 0 ; shift value for OPM_AYTONE_CMD80_PERIOD_HIGH
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OPM_AYTONE_CMD80_PERIOD_LOW equ (1 << 4) ;
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OPM_AYTONE_CMD80_PERIOD_LOW_BIT equ 4 ; shift value for OPM_AYTONE_CMD80_PERIOD_LOW
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OPM_AYTONE_CMD80_EOF equ (1 << 5) ;
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OPM_AYTONE_CMD80_EOF_BIT equ 5 ; shift value for OPM_AYTONE_CMD80_EOF
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OPM_AYTONE_MASK_TONE equ (1 << 0) ;
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OPM_AYTONE_MASK_TONE_BIT equ 0 ; shift value for OPM_AYTONE_MASK_TONE
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OPM_AYTONE_MASK_NOISE equ (1 << 1) ;
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OPM_AYTONE_MASK_NOISE_BIT equ 1 ; shift value for OPM_AYTONE_MASK_NOISE
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OPM_AYTONE_MASK_EOF equ (1 << 2) ;
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OPM_AYTONE_MASK_EOF_BIT equ 2 ; shift value for OPM_AYTONE_MASK_EOF
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; OPN SSG envelope/noise stream commands (shared with AY chip type)
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OPM_AYENV_REGS equ 0x00 ; 00..7F - set noise and period low
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OPM_AYENV_ENVTYPE equ 0x80 ; 80..BF - set env type and period low
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OPM_AYENV_PERIOD_FULL equ 0xF0 ; F0..F7 - set full envelope period
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OPM_AYENV_CMD00_NOISE_MASK equ (0x1F << 0) ;
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OPM_AYENV_CMD00_NOISE_MASK_BIT equ 0 ; shift value for OPM_AYENV_CMD00_NOISE_MASK
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OPM_AYENV_CMD00_PERIOD_LOW equ (1 << 5) ;
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OPM_AYENV_CMD00_PERIOD_LOW_BIT equ 5 ; shift value for OPM_AYENV_CMD00_PERIOD_LOW
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OPM_AYENV_CMD00_EOF equ (1 << 6) ;
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OPM_AYENV_CMD00_EOF_BIT equ 6 ; shift value for OPM_AYENV_CMD00_EOF
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OPM_AYENV_CMD80_ENV_TYPE equ (0xF << 0) ;
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OPM_AYENV_CMD80_ENV_TYPE_BIT equ 0 ; shift value for OPM_AYENV_CMD80_ENV_TYPE
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OPM_AYENV_CMD80_PERIOD_LOW equ (1 << 4) ;
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OPM_AYENV_CMD80_PERIOD_LOW_BIT equ 4 ; shift value for OPM_AYENV_CMD80_PERIOD_LOW
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OPM_AYENV_CMD80_EOF equ (1 << 5) ;
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OPM_AYENV_CMD80_EOF_BIT equ 5 ; shift value for OPM_AYENV_CMD80_EOF
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OPM_AYENV_CMDF0_PERIOD_LOW equ (1 << 0) ;
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OPM_AYENV_CMDF0_PERIOD_LOW_BIT equ 0 ; shift value for OPM_AYENV_CMDF0_PERIOD_LOW
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OPM_AYENV_CMDF0_PERIOD_HIGH equ (1 << 1) ;
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OPM_AYENV_CMDF0_PERIOD_HIGH_BIT equ 1 ; shift value for OPM_AYENV_CMDF0_PERIOD_HIGH
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OPM_AYENV_CMDF0_EOF equ (1 << 2) ;
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OPM_AYENV_CMDF0_EOF_BIT equ 2 ; shift value for OPM_AYENV_CMDF0_EOF |