277 lines
		
	
	
		
			5.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			277 lines
		
	
	
		
			5.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright (C) 2023 nukeykt
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 *
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 * This file is part of YM3812-LLE.
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License
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 * as published by the Free Software Foundation; either version 2
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 * of the License, or (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 *  YM3812 emulator
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 *  Thanks:
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 *      Travis Goodspeed:
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 *          YM3812 decap and die shot
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 *
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 */
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#pragma once
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typedef struct
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{
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    int mclk;
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    int address;
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    int data_i;
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    int ic;
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    int cs;
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    int rd;
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    int wr;
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} fmopl2_input_t;
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typedef struct
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{
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    fmopl2_input_t input;
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    int mclk1;
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    int mclk2;
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    int clk1;
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    int clk2;
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    int prescaler_reset_l[2];
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    int prescaler_cnt[2];
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    int prescaler_l1[2];
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    int prescaler_l2[2];
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    int reset1;
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    int fsm_reset_l[2];
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    int fsm_reset; // wire
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    int fsm_cnt1[2];
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    int fsm_cnt2[2];
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    int fsm_cnt1_of; // wire
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    int fsm_cnt2_of; // wire
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    int fsm_sel[13];
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    int fsm_cnt; // wire
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    int fsm_ch_out;
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    int fsm_do_fb;
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    int fsm_load_fb;
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    int fsm_l1[2];
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    int fsm_l2[2];
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    int fsm_l3[2];
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    int fsm_l4[2];
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    int fsm_l5[2];
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    int fsm_l6[2];
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    int fsm_out[16];
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    int io_rd;
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    int io_wr;
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    int io_cs;
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    int io_a0;
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    int io_read0;
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    int io_read1;
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    int io_write;
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    int io_write0;
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    int io_write1;
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    int io_dir;
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    int io_data;
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    int data_latch;
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    int write0;
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    int write0_sr;
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    int write0_latch[6];
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    int write1;
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    int write1_sr;
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    int write1_latch[6];
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    int reg_sel1;
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    int reg_sel2;
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    int reg_sel3;
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    int reg_sel4;
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    int reg_sel8;
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    int reg_selbd;
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    int reg_test;
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    int reg_timer1;
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    int reg_timer2;
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    int reg_notesel;
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    int reg_csm;
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    int reg_da;
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    int reg_dv;
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    int rhythm;
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    int reg_rh_kon;
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    int reg_sel4_wr; // wire
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    int reg_sel4_rst; // wire
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    int reg_t1_mask;
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    int reg_t2_mask;
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    int reg_t1_start;
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    int reg_t2_start;
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    int reg_mode_b3;
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    int reg_mode_b4;
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    int t1_cnt[2];
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    int t2_cnt[2];
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    int t1_of[2];
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    int t2_of[2];
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    int t1_status;
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    int t2_status;
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    int unk_status1;
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    int unk_status2;
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    int timer_st_load_l;
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    int timer_st_load;
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    int t1_start;
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    int t1_start_l[2];
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    int t2_start_l[2];
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    int t1_load; // wire
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    int csm_load_l;
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    int csm_load;
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    int csm_kon;
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    int rh_sel0;
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    int rh_sel[2];
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    int keyon_comb;
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    int address;
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    int address_valid;
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    int address_valid_l[2];
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    int address_valid2;
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    int data;
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    int slot_cnt1[2];
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    int slot_cnt2[2];
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    int slot_cnt;
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    int sel_ch;
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    int ch_fnum[10][2];
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    int ch_block[3][2];
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    int ch_keyon[2];
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    int ch_connect[2];
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    int ch_fb[3][2];
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    int op_multi[4][2];
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    int op_ksr[2];
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    int op_egt[2];
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    int op_vib[2];
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    int op_am[2];
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    int op_tl[6][2];
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    int op_ksl[2][2];
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    int op_ar[4][2];
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    int op_dr[4][2];
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    int op_sl[4][2];
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    int op_rr[4][2];
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    int op_wf[2][2];
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    int op_mod[2];
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    int op_value; // wire
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    int eg_load1_l;
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    int eg_load1;
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    int eg_load2_l;
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    int eg_load2;
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    int eg_load3_l;
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    int eg_load3;
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    int trem_carry[2];
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    int trem_value[2];
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    int trem_dir[2];
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    int trem_step;
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    int trem_out;
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    int trem_of[2];
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    int eg_timer[2];
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    int eg_timer_masked[2];
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    int eg_carry[2];
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    int eg_mask[2];
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    int eg_subcnt[2];
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    int eg_subcnt_l[2];
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    int eg_sync_l[2];
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    int eg_timer_low;
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    int eg_shift;
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    int eg_state[2][2];
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    int eg_level[9][2];
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    int eg_out[2];
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    int eg_dokon; // wire
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    int eg_mute[2];
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    int block;
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    int fnum;
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    int keyon;
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    int connect;
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    int connect_l[2];
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    int fb;
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    int fb_l[2][2];
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    int multi;
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    int ksr;
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    int egt;
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    int vib;
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    int am;
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    int tl;
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    int ksl;
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    int ar;
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    int dr;
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    int sl;
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    int rr;
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    int wf;
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    int lfo_cnt[2];
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    int t1_step; // wire
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    int t2_step; // wire
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    int am_step; // wire
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    int vib_step; // wire
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    int vib_cnt[2];
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    int pg_phase[19][2];
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    int dbg_serial[2];
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    int noise_lfsr[2];
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    int hh_load;
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    int tc_load;
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    int hh_bit2;
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    int hh_bit3;
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    int hh_bit7;
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    int hh_bit8;
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    int tc_bit3;
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    int tc_bit5;
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    int op_logsin[2];
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    int op_shift[2];
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    int op_pow[2];
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    int op_mute[2];
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    int op_sign[2];
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    int op_fb[2][13][2];
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    int pg_out; // wire
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    int pg_out_rhy; // wire
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    int accm_value[2];
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    int accm_shifter[2];
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    int accm_load1_l;
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    int accm_load1;
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    int accm_clamplow;
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    int accm_clamphigh;
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    int accm_top;
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    int accm_sel[2];
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    int accm_mo[2];
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    int o_sh;
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    int o_mo;
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    int o_irq_pull;
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    int o_sy;
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    int data_o;
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    int data_z;
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    int o_clk1;
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    int o_clk2;
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    int o_reset1;
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    int o_write0;
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    int o_write1;
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    int o_data_latch;
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    int op_value_debug;
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} fmopl2_t;
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// modification
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void FMOPL2_Clock(fmopl2_t *chip);
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