216 lines
		
	
	
		
			5.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			216 lines
		
	
	
		
			5.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright (C) 2017-2021 Alexey Khokholov (Nuke.YKT)
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 *
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 * This file is part of Nuked OPN2.
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2.1 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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 *
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 *  Nuked OPN2(Yamaha YM3438) emulator.
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 *  Thanks:
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 *      Silicon Pr0n:
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 *          Yamaha YM3438 decap and die shot(digshadow).
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 *      OPLx decapsulated(Matthew Gambrell, Olli Niemitalo):
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 *          OPL2 ROMs.
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 *
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 * version: 1.0.9
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 */
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#ifndef YM3438_H
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#define YM3438_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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enum {
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    ym3438_mode_ym2612 = 0x01,      /* Enables YM2612 emulation (MD1, MD2 VA2) */
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    ym3438_mode_readmode = 0x02,    /* Enables status read on any port (TeraDrive, MD1 VA7, MD2, etc) */
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    ym3438_mode_opn = 0x04          /* Outputs full, unshifted signal per channel (OPN/OPNA/OPNB) */
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};
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#include <stdint.h>
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typedef uintptr_t       Bitu;
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typedef intptr_t        Bits;
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typedef uint64_t        Bit64u;
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typedef int64_t         Bit64s;
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typedef uint32_t        Bit32u;
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typedef int32_t         Bit32s;
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typedef uint16_t        Bit16u;
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typedef int16_t         Bit16s;
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typedef uint8_t         Bit8u;
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typedef int8_t          Bit8s;
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typedef struct
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{
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    Bit32u cycles;
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    Bit32u channel;
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    Bit16s mol, mor;
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    /* IO */
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    Bit16u write_data;
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    Bit8u write_a;
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    Bit8u write_d;
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    Bit8u write_a_en;
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    Bit8u write_d_en;
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    Bit8u write_busy;
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    Bit8u write_busy_cnt;
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    Bit8u write_fm_address;
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    Bit8u write_fm_data;
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    Bit16u write_fm_mode_a;
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    Bit16u address;
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    Bit8u data;
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    Bit8u pin_test_in;
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    Bit8u pin_irq;
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    Bit8u busy;
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    /* LFO */
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    Bit8u lfo_en;
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    Bit8u lfo_freq;
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    Bit8u lfo_pm;
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    Bit8u lfo_am;
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    Bit8u lfo_cnt;
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    Bit8u lfo_inc;
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    Bit8u lfo_quotient;
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    /* Phase generator */
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    Bit16u pg_fnum;
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    Bit8u pg_block;
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    Bit8u pg_kcode;
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    Bit32u pg_inc[24];
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    Bit32u pg_phase[24];
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    Bit8u pg_reset[24];
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    Bit32u pg_read;
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    /* Envelope generator */
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    Bit8u eg_cycle;
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    Bit8u eg_cycle_stop;
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    Bit8u eg_shift;
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    Bit8u eg_shift_lock;
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    Bit8u eg_timer_low_lock;
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    Bit16u eg_timer;
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    Bit8u eg_timer_inc;
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    Bit16u eg_quotient;
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    Bit8u eg_custom_timer;
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    Bit8u eg_rate;
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    Bit8u eg_ksv;
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    Bit8u eg_inc;
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    Bit8u eg_ratemax;
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    Bit8u eg_sl[2];
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    Bit8u eg_lfo_am;
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    Bit8u eg_tl[2];
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    Bit8u eg_state[24];
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    Bit16u eg_level[24];
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    Bit16u eg_out[24];
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    Bit8u eg_kon[24];
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    Bit8u eg_kon_csm[24];
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    Bit8u eg_kon_latch[24];
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    Bit8u eg_csm_mode[24];
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    Bit8u eg_ssg_enable[24];
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    Bit8u eg_ssg_pgrst_latch[24];
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    Bit8u eg_ssg_repeat_latch[24];
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    Bit8u eg_ssg_hold_up_latch[24];
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    Bit8u eg_ssg_dir[24];
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    Bit8u eg_ssg_inv[24];
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    Bit32u eg_read[2];
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    Bit8u eg_read_inc;
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    /* Settings */
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    Bit8u chip_type;
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    /* FM */
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    Bit16s fm_op1[6][2];
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    Bit16s fm_op2[6];
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    Bit16s fm_out[24];
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    Bit16u fm_mod[24];
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    /* Channel */
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    Bit16s ch_acc[6];
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    Bit16s ch_out[6];
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    Bit16s ch_lock;
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    Bit8u ch_lock_l;
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    Bit8u ch_lock_r;
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    Bit16s ch_read;
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    /* Timer */
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    Bit16u timer_a_cnt;
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    Bit16u timer_a_reg;
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    Bit8u timer_a_load_lock;
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    Bit8u timer_a_load;
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    Bit8u timer_a_enable;
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    Bit8u timer_a_reset;
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    Bit8u timer_a_load_latch;
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    Bit8u timer_a_overflow_flag;
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    Bit8u timer_a_overflow;
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    Bit16u timer_b_cnt;
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    Bit8u timer_b_subcnt;
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    Bit16u timer_b_reg;
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    Bit8u timer_b_load_lock;
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    Bit8u timer_b_load;
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    Bit8u timer_b_enable;
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    Bit8u timer_b_reset;
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    Bit8u timer_b_load_latch;
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    Bit8u timer_b_overflow_flag;
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    Bit8u timer_b_overflow;
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    /* Register set */
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    Bit8u mode_test_21[8];
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    Bit8u mode_test_2c[8];
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    Bit8u mode_ch3;
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    Bit8u mode_kon_channel;
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    Bit8u mode_kon_operator[4];
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    Bit8u mode_kon[24];
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    Bit8u mode_csm;
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    Bit8u mode_kon_csm;
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    Bit8u dacen;
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    Bit16s dacdata;
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    Bit8u ks[24];
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    Bit8u ar[24];
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    Bit8u sr[24];
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    Bit8u dt[24];
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    Bit8u multi[24];
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    Bit8u sl[24];
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    Bit8u rr[24];
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    Bit8u dr[24];
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    Bit8u am[24];
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    Bit8u tl[24];
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    Bit8u ssg_eg[24];
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    Bit16u fnum[6];
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    Bit8u block[6];
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    Bit8u kcode[6];
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    Bit16u fnum_3ch[6];
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    Bit8u block_3ch[6];
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    Bit8u kcode_3ch[6];
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    Bit8u reg_a4;
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    Bit8u reg_ac;
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    Bit8u connect[6];
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    Bit8u fb[6];
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    Bit8u pan_l[6], pan_r[6];
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    Bit8u ams[6];
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    Bit8u pms[6];
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    Bit8u status;
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    Bit32u status_time;
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} ym3438_t;
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void OPN2_Reset(ym3438_t *chip);
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void OPN2_SetChipType(ym3438_t *chip, Bit32u type);
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void OPN2_Clock(ym3438_t *chip, Bit16s *buffer);
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void OPN2_Write(ym3438_t *chip, Bit32u port, Bit8u data);
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void OPN2_SetTestPin(ym3438_t *chip, Bit32u value);
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Bit32u OPN2_ReadTestPin(ym3438_t *chip);
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Bit32u OPN2_ReadIRQPin(ym3438_t *chip);
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Bit8u OPN2_Read(ym3438_t *chip, Bit32u port);
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#ifdef __cplusplus
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}
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#endif
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#endif
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