Reset period counter when writing to period registers.

This is what happens on real SCC. See also e.g. openMSX core:
https://github.com/openMSX/openMSX/blob/master/src/sound/SCC.cc#L390

To reduce the noise introduced by this, we add extra checks to only
write the period when it has actually changed.
This commit is contained in:
Laurens Holst 2022-05-13 16:34:48 +02:00
parent 34d868522b
commit e2c1233b12
3 changed files with 12 additions and 3 deletions

View file

@ -454,6 +454,7 @@ void scc_core::freq_vol_enable_w(u8 address, u8 data)
if (m_test.resetpos) // Reset address
m_voice[voice_freq].addr = 0;
m_voice[voice_freq].pitch = (m_voice[voice_freq].pitch & ~0x0ff) | data;
m_voice[voice_freq].counter = m_voice[voice_freq].pitch;
break;
case 0x1: // 0x*1 Voice 0 Pitch MSB
case 0x3: // 0x*3 Voice 1 Pitch MSB
@ -463,6 +464,7 @@ void scc_core::freq_vol_enable_w(u8 address, u8 data)
if (m_test.resetpos) // Reset address
m_voice[voice_freq].addr = 0;
m_voice[voice_freq].pitch = (m_voice[voice_freq].pitch & ~0xf00) | (u16(bitfield(data, 0, 4)) << 8);
m_voice[voice_freq].counter = m_voice[voice_freq].pitch;
break;
case 0xa: // 0x*a Voice 0 Volume
case 0xb: // 0x*b Voice 1 Volume