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Change OPN2 to OPN2C on non-Genesis presets (#2573)

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ヴェルメンスィヱ 2025-06-18 08:07:17 +00:00 committed by GitHub
parent b7e63d2ee8
commit e209fd0b18
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GPG key ID: B5690EEEBB952194
1 changed files with 153 additions and 42 deletions
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195
src/gui/presets.cpp
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@ -1529,35 +1529,35 @@ void FurnaceGUI::initSystemPresets() {
);
SUB_ENTRY(
"Sega TeraDrive", {
CH(DIV_SYSTEM_YM2612, 1.0f, 0, ""),
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "chipType=0"), // YM3438
CH(DIV_SYSTEM_SMS, 0.5f, 0, ""),
CH(DIV_SYSTEM_PCSPKR, 1.0f, 0, "")
}
);
SUB_SUB_ENTRY(
"Sega TeraDrive (extended channel 3)", {
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, ""),
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "chipType=0"), // YM3438
CH(DIV_SYSTEM_SMS, 0.5f, 0, ""),
CH(DIV_SYSTEM_PCSPKR, 1.0f, 0, "")
}
);
SUB_SUB_ENTRY(
"Sega TeraDrive (CSM)", {
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0, ""),
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0, "chipType=0"), // YM3438
CH(DIV_SYSTEM_SMS, 0.5f, 0, ""),
CH(DIV_SYSTEM_PCSPKR, 1.0f, 0, "")
}
);
SUB_SUB_ENTRY(
"Sega TeraDrive (DualPCM)", {
CH(DIV_SYSTEM_YM2612_DUALPCM, 1.0f, 0, ""),
CH(DIV_SYSTEM_YM2612_DUALPCM, 1.0f, 0, "chipType=0"), // YM3438
CH(DIV_SYSTEM_SMS, 0.5f, 0, ""),
CH(DIV_SYSTEM_PCSPKR, 1.0f, 0, "")
}
);
SUB_SUB_ENTRY(
"Sega TeraDrive (DualPCM, extended channel 3)", {
CH(DIV_SYSTEM_YM2612_DUALPCM_EXT, 1.0f, 0, ""),
CH(DIV_SYSTEM_YM2612_DUALPCM_EXT, 1.0f, 0, "chipType=0"), // YM3438
CH(DIV_SYSTEM_SMS, 0.5f, 0, ""),
CH(DIV_SYSTEM_PCSPKR, 1.0f, 0, "")
}
@ -1599,19 +1599,28 @@ void FurnaceGUI::initSystemPresets() {
);
ENTRY(
_("FM Towns"), {
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=2"), // YM3438
CH(DIV_SYSTEM_YM2612, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // YM3438
CH(DIV_SYSTEM_RF5C68, 1.0f, 0, "")
}
);
SUB_ENTRY(
_("FM Towns (extended channel 3)"), {
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=2"), // YM3438
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // YM3438
CH(DIV_SYSTEM_RF5C68, 1.0f, 0, "")
}
);
SUB_ENTRY(
_("FM Towns (CSM)"), {
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0, "clockSel=2"), // YM3438
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // YM3438
CH(DIV_SYSTEM_RF5C68, 1.0f, 0, "")
}
);
@ -2416,57 +2425,105 @@ void FurnaceGUI::initSystemPresets() {
);
SUB_ENTRY(
_("Sega System 18"), {
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=2"), // discrete 8MHz YM3438
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=2"), // ^^
CH(DIV_SYSTEM_YM2612, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // discrete 8MHz YM3438
CH(DIV_SYSTEM_YM2612, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0, "clockSel=1") // 10MHz
}
);
SUB_ENTRY(
_("Sega System 18 (extended channel 3 on first OPN2C)"), {
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=2"), // discrete 8MHz YM3438
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=2"), // ^^
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // discrete 8MHz YM3438
CH(DIV_SYSTEM_YM2612, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0, "clockSel=1") // 10MHz
}
);
SUB_ENTRY(
_("Sega System 18 (extended channel 3 on second OPN2C)"), {
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=2"), // discrete 8MHz YM3438
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=2"), // ^^
CH(DIV_SYSTEM_YM2612, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // discrete 8MHz YM3438
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0, "clockSel=1") // 10MHz
}
);
SUB_ENTRY(
_("Sega System 18 (extended channel 3 on both OPN2Cs)"), {
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=2"), // discrete 8MHz YM3438
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=2"), // ^^
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // discrete 8MHz YM3438
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0, "clockSel=1") // 10MHz
}
);
SUB_ENTRY(
_("Sega System 18 (CSM on first OPN2C)"), {
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0, "clockSel=2"), // discrete 8MHz YM3438
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=2"), // ^^
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // discrete 8MHz YM3438
CH(DIV_SYSTEM_YM2612, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0, "clockSel=1") // 10MHz
}
);
SUB_ENTRY(
_("Sega System 18 (CSM on second OPN2C)"), {
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=2"), // discrete 8MHz YM3438
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0, "clockSel=2"), // ^^
CH(DIV_SYSTEM_YM2612, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // discrete 8MHz YM3438
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0, "clockSel=1") // 10MHz
}
);
SUB_ENTRY(
_("Sega System 18 (CSM on both OPN2Cs)"), {
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0, "clockSel=2"), // discrete 8MHz YM3438
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0, "clockSel=2"), // ^^
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // discrete 8MHz YM3438
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0, "clockSel=1") // 10MHz
}
);
SUB_ENTRY(
_("Sega System 32"), {
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=4"), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=4"), // ^^
CH(DIV_SYSTEM_YM2612, 1.0f, 0,
"clockSel=4\n"
"chipType=0\n"
), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612, 1.0f, 0,
"clockSel=4\n"
"chipType=0\n"
), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0,
"clockSel=2\n"
"chipType=1\n"
@ -2475,8 +2532,14 @@ void FurnaceGUI::initSystemPresets() {
);
SUB_ENTRY(
_("Sega System 32 (extended channel 3 on first OPN2C)"), {
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=4"), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=4"), // ^^
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0,
"clockSel=4\n"
"chipType=0\n"
), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612, 1.0f, 0,
"clockSel=4\n"
"chipType=0\n"
), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0,
"clockSel=2\n"
"chipType=1\n"
@ -2485,8 +2548,14 @@ void FurnaceGUI::initSystemPresets() {
);
SUB_ENTRY(
_("Sega System 32 (extended channel 3 on second OPN2C)"), {
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=4"), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=4"), // ^^
CH(DIV_SYSTEM_YM2612, 1.0f, 0,
"clockSel=4\n"
"chipType=0\n"
), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0,
"clockSel=4\n"
"chipType=0\n"
), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0,
"clockSel=2\n"
"chipType=1\n"
@ -2495,8 +2564,14 @@ void FurnaceGUI::initSystemPresets() {
);
SUB_ENTRY(
_("Sega System 32 (extended channel 3 on both OPN2Cs)"), {
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=4"), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=4"), // ^^
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0,
"clockSel=4\n"
"chipType=0\n"
), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0,
"clockSel=4\n"
"chipType=0\n"
), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0,
"clockSel=2\n"
"chipType=1\n"
@ -2505,8 +2580,14 @@ void FurnaceGUI::initSystemPresets() {
);
SUB_ENTRY(
_("Sega System 32 (CSM on first OPN2C)"), {
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0, "clockSel=4"), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=4"), // ^^
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0,
"clockSel=4\n"
"chipType=0\n"
), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612, 1.0f, 0,
"clockSel=4\n"
"chipType=0\n"
), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0,
"clockSel=2\n"
"chipType=1\n"
@ -2515,8 +2596,14 @@ void FurnaceGUI::initSystemPresets() {
);
SUB_ENTRY(
_("Sega System 32 (CSM on second OPN2C)"), {
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=4"), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0, "clockSel=4"), // ^^
CH(DIV_SYSTEM_YM2612, 1.0f, 0,
"clockSel=4\n"
"chipType=0\n"
), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0,
"clockSel=4\n"
"chipType=0\n"
), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0,
"clockSel=2\n"
"chipType=1\n"
@ -2525,8 +2612,14 @@ void FurnaceGUI::initSystemPresets() {
);
SUB_ENTRY(
_("Sega System 32 (CSM on both OPN2Cs)"), {
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0, "clockSel=4"), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0, "clockSel=4"), // ^^
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0,
"clockSel=4\n"
"chipType=0\n"
), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0,
"clockSel=4\n"
"chipType=0\n"
), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0,
"clockSel=2\n"
"chipType=1\n"
@ -2545,19 +2638,28 @@ void FurnaceGUI::initSystemPresets() {
SUB_ENTRY(
_("Seta 1 + FM add-on"), {
CH(DIV_SYSTEM_X1_010, 1.0f, 0, ""),
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=2") // Discrete YM3438
CH(DIV_SYSTEM_YM2612, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
) // Discrete YM3438
}
);
SUB_ENTRY(
_("Seta 1 + FM add-on (extended channel 3)"), {
CH(DIV_SYSTEM_X1_010, 1.0f, 0, ""),
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=2") // Discrete YM3438
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
) // Discrete YM3438
}
);
SUB_ENTRY(
_("Seta 1 + FM add-on (CSM)"), {
CH(DIV_SYSTEM_X1_010, 1.0f, 0, ""),
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0, "clockSel=2") // Discrete YM3438
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
) // Discrete YM3438
}
);
SUB_ENTRY(
@ -2703,19 +2805,28 @@ void FurnaceGUI::initSystemPresets() {
);
SUB_ENTRY(
_("Sunsoft Arcade"), {
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=2"), // discrete YM3438 8MHz
CH(DIV_SYSTEM_YM2612, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // discrete YM3438 8MHz
CH(DIV_SYSTEM_MSM6295, 1.0f, 0, "clockSel=1") // 1.056MHz
}
);
SUB_ENTRY(
_("Sunsoft Arcade (extended channel 3)"), {
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=2"), // discrete YM3438 8MHz
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // discrete YM3438 8MHz
CH(DIV_SYSTEM_MSM6295, 1.0f, 0, "clockSel=1") // 1.056MHz
}
);
SUB_ENTRY(
_("Sunsoft Arcade (CSM)"), {
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0, "clockSel=2"), // discrete YM3438 8MHz
CH(DIV_SYSTEM_YM2612_CSM, 1.0f, 0,
"clockSel=2\n"
"chipType=0\n"
), // discrete YM3438 8MHz
CH(DIV_SYSTEM_MSM6295, 1.0f, 0, "clockSel=1") // 1.056MHz
}
);