Merge branch 'master' of https://github.com/tildearrow/furnace into sample_macro
This commit is contained in:
commit
e00758d67c
54 changed files with 1068 additions and 219 deletions
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@ -151,7 +151,7 @@ void DivPlatformArcade::tick(bool sysTick) {
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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if (isOutput[chan[i].state.alg][j]) {
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if (KVS(i,j)) {
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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@ -231,7 +231,7 @@ void DivPlatformArcade::tick(bool sysTick) {
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[i].state.alg][j]) {
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if (KVS(i,j)) {
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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@ -289,7 +289,7 @@ void DivPlatformArcade::tick(bool sysTick) {
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}
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if (m.tl.had) {
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op.tl=127-m.tl.val;
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if (isOutput[chan[i].state.alg][j]) {
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if (KVS(i,j)) {
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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@ -390,7 +390,7 @@ int DivPlatformArcade::dispatch(DivCommand c) {
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for (int i=0; i<4; i++) {
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
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DivInstrumentFM::Operator op=chan[c.chan].state.op[i];
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if (isOutput[chan[c.chan].state.alg][i]) {
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if (KVS(c.chan,i)) {
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if (!chan[c.chan].active || chan[c.chan].insChanged) {
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
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}
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@ -448,7 +448,7 @@ int DivPlatformArcade::dispatch(DivCommand c) {
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for (int i=0; i<4; i++) {
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
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if (isOutput[chan[c.chan].state.alg][i]) {
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if (KVS(c.chan,i)) {
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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@ -545,7 +545,7 @@ int DivPlatformArcade::dispatch(DivCommand c) {
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
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op.tl=c.value2;
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if (isOutput[chan[c.chan].state.alg][c.value]) {
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if (KVS(c.chan,c.value)) {
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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@ -746,7 +746,7 @@ void DivPlatformArcade::forceIns() {
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator op=chan[i].state.op[j];
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if (isOutput[chan[i].state.alg][j]) {
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if (KVS(i,j)) {
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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@ -156,8 +156,8 @@ void DivPlatformAY8910::acquire(short* bufL, short* bufR, size_t start, size_t l
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ay->sound_stream_update(ayBuf,len);
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if (stereo) {
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for (size_t i=0; i<len; i++) {
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bufL[i+start]=ayBuf[0][i]+ayBuf[1][i];
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bufR[i+start]=ayBuf[1][i]+ayBuf[2][i];
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bufL[i+start]=ayBuf[0][i]+ayBuf[1][i]+((ayBuf[2][i]*stereoSep)>>8);
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bufR[i+start]=((ayBuf[0][i]*stereoSep)>>8)+ayBuf[1][i]+ayBuf[2][i];
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}
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} else {
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for (size_t i=0; i<len; i++) {
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@ -167,7 +167,7 @@ void DivPlatformAY8910::acquire(short* bufL, short* bufR, size_t start, size_t l
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}
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for (int ch=0; ch<3; ch++) {
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for (size_t i=0; i<len; i++) {
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oscBuf[ch]->data[oscBuf[ch]->needle++]=ayBuf[ch][i];
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oscBuf[ch]->data[oscBuf[ch]->needle++]=ayBuf[ch][i]<<2;
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}
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}
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}
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@ -803,6 +803,7 @@ void DivPlatformAY8910::setFlags(unsigned int flags) {
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ay->device_reset();
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stereo=(flags>>6)&1;
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stereoSep=(flags>>8)&255;
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}
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int DivPlatformAY8910::init(DivEngine* p, int channels, int sugRate, unsigned int flags) {
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@ -124,6 +124,7 @@ class DivPlatformAY8910: public DivDispatch {
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unsigned char lastBusy;
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unsigned char sampleBank;
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unsigned char stereoSep;
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int delay;
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@ -140,8 +140,8 @@ void DivPlatformAY8930::acquire(short* bufL, short* bufR, size_t start, size_t l
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ay->sound_stream_update(ayBuf,len);
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if (stereo) {
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for (size_t i=0; i<len; i++) {
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bufL[i+start]=ayBuf[0][i]+ayBuf[1][i];
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bufR[i+start]=ayBuf[1][i]+ayBuf[2][i];
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bufL[i+start]=ayBuf[0][i]+ayBuf[1][i]+((ayBuf[2][i]*stereoSep)>>8);
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bufR[i+start]=((ayBuf[0][i]*stereoSep)>>8)+ayBuf[1][i]+ayBuf[2][i];
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}
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} else {
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for (size_t i=0; i<len; i++) {
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@ -152,7 +152,7 @@ void DivPlatformAY8930::acquire(short* bufL, short* bufR, size_t start, size_t l
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for (int ch=0; ch<3; ch++) {
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for (size_t i=0; i<len; i++) {
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oscBuf[ch]->data[oscBuf[ch]->needle++]=ayBuf[ch][i];
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oscBuf[ch]->data[oscBuf[ch]->needle++]=ayBuf[ch][i]<<2;
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}
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}
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}
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@ -760,6 +760,7 @@ void DivPlatformAY8930::setFlags(unsigned int flags) {
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}
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stereo=(flags>>6)&1;
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stereoSep=(flags>>8)&255;
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}
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int DivPlatformAY8930::init(DivEngine* p, int channels, int sugRate, unsigned int flags) {
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@ -132,6 +132,7 @@ class DivPlatformAY8930: public DivDispatch {
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DivDispatchOscBuffer* oscBuf[3];
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unsigned char regPool[32];
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unsigned char ayNoiseAnd, ayNoiseOr;
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unsigned char stereoSep;
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bool bank;
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unsigned char sampleBank;
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@ -23,6 +23,8 @@
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#include "../dispatch.h"
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#include <deque>
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#define KVS(x,y) ((chan[x].state.op[y].kvs==2 && isOutput[chan[x].state.alg][y]) || chan[x].state.op[y].kvs==1)
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class DivPlatformFMBase: public DivDispatch {
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protected:
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const bool isOutput[8][4]={
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@ -254,7 +254,7 @@ void DivPlatformGenesis::tick(bool sysTick) {
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[i].state.alg][j]) {
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if (KVS(i,j)) {
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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@ -327,7 +327,7 @@ void DivPlatformGenesis::tick(bool sysTick) {
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[i].state.alg][j]) {
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if (KVS(i,j)) {
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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@ -384,7 +384,7 @@ void DivPlatformGenesis::tick(bool sysTick) {
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[i].state.alg][j]) {
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if (KVS(i,j)) {
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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@ -501,7 +501,7 @@ void DivPlatformGenesis::muteChannel(int ch, bool mute) {
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if (isMuted[ch]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[ch].state.alg][j]) {
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if (KVS(ch,j)) {
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[ch].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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@ -614,7 +614,7 @@ int DivPlatformGenesis::dispatch(DivCommand c) {
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if (isMuted[c.chan]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[c.chan].state.alg][i]) {
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if (KVS(c.chan,i)) {
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if (!chan[c.chan].active || chan[c.chan].insChanged) {
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
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}
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@ -687,7 +687,7 @@ int DivPlatformGenesis::dispatch(DivCommand c) {
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if (isMuted[c.chan]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[c.chan].state.alg][i]) {
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if (KVS(c.chan,i)) {
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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@ -860,7 +860,7 @@ int DivPlatformGenesis::dispatch(DivCommand c) {
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if (isMuted[c.chan]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[c.chan].state.alg][c.value]) {
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if (KVS(c.chan,c.value)) {
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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@ -1051,7 +1051,7 @@ void DivPlatformGenesis::forceIns() {
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[i].state.alg][j]) {
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if (KVS(i,j)) {
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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@ -209,7 +209,7 @@ int DivPlatformGenesisExt::dispatch(DivCommand c) {
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op.tl=c.value2;
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if (isOpMuted[ch]) {
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rWrite(baseAddr+0x40,127);
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} else if (isOutput[chan[2].state.alg][c.value]) {
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} else if (KVS(2,c.value)) {
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rWrite(baseAddr+0x40,127-VOL_SCALE_LOG(127-op.tl,opChan[ch].vol&0x7f,127));
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} else {
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rWrite(baseAddr+0x40,op.tl);
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@ -392,7 +392,7 @@ void DivPlatformGenesisExt::muteChannel(int ch, bool mute) {
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if (isOpMuted[ch-2]) {
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rWrite(baseAddr+0x40,127);
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immWrite(baseAddr+0x40,127);
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} else if (isOutput[chan[2].state.alg][ordch]) {
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} else if (KVS(2,ordch)) {
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rWrite(baseAddr+0x40,127-VOL_SCALE_LOG(127-op.tl,opChan[ch-2].vol&0x7f,127));
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immWrite(baseAddr+0x40,127-VOL_SCALE_LOG(127-op.tl,opChan[ch-2].vol&0x7f,127));
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} else {
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@ -526,7 +526,7 @@ void DivPlatformGenesisExt::forceIns() {
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if (i==2 && extMode) { // extended channel
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if (isOpMuted[j]) {
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rWrite(baseAddr+0x40,127);
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} else if (isOutput[chan[i].state.alg][j]) {
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} else if (KVS(i,j)) {
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rWrite(baseAddr+0x40,127-VOL_SCALE_LOG(127-op.tl,opChan[j].vol&0x7f,127));
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} else {
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rWrite(baseAddr+0x40,op.tl);
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@ -535,7 +535,7 @@ void DivPlatformGenesisExt::forceIns() {
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[i].state.alg][j]) {
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if (KVS(i,j)) {
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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@ -26,6 +26,8 @@
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#define rWrite(a,v) if (!skipRegisterWrites) {pendingWrites[a]=v;}
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#define immWrite(a,v) if (!skipRegisterWrites) {writes.emplace(a,v); if (dumpWrites) {addWrite(a,v);} }
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#define KVSL(x,y) ((chan[x].state.op[orderedOpsL1[ops==4][y]].kvs==2 && isOutputL[ops==4][chan[x].state.alg][y]) || chan[x].state.op[orderedOpsL1[ops==4][y]].kvs==1)
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#define CHIP_FREQBASE chipFreqBase
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// N = invalid
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@ -138,6 +140,11 @@ const bool isOutputL[2][4][4]={
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#undef N
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const int orderedOpsL1[2][4]={
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{0, 1, 0, 1}, // 2-op
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{0, 2, 1, 3} // 4-op
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};
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const int orderedOpsL[4]={
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0,2,1,3
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};
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@ -288,7 +295,7 @@ void DivPlatformOPL::tick(bool sysTick) {
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
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} else {
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if (isOutputL[ops==4][chan[i].state.alg][j] || i>melodicChans) {
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if (KVSL(i,j) || i>melodicChans) {
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rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[i].outVol&0x3f,63))|(op.ksl<<6));
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} else {
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rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
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@ -406,7 +413,7 @@ void DivPlatformOPL::tick(bool sysTick) {
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
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} else {
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if (isOutputL[ops==4][chan[i].state.alg][j] || i>melodicChans) {
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if (KVSL(i,j) || i>melodicChans) {
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rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[i].outVol&0x3f,63))|(op.ksl<<6));
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} else {
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rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
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@ -626,7 +633,7 @@ void DivPlatformOPL::muteChannel(int ch, bool mute) {
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if (isMuted[ch]) {
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rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
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} else {
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if (isOutputL[ops==4][chan[ch].state.alg][i] || ch>melodicChans) {
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if (KVSL(ch,i) || ch>melodicChans) {
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rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[ch].outVol&0x3f,63))|(op.ksl<<6));
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} else {
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rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
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@ -802,7 +809,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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if (isMuted[c.chan]) {
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rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
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} else {
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if (isOutputL[ops==4][chan[c.chan].state.alg][i] || c.chan>melodicChans) {
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if (KVSL(c.chan,i) || c.chan>melodicChans) {
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rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[c.chan].outVol&0x3f,63))|(op.ksl<<6));
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} else {
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rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
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@ -910,7 +917,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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if (isMuted[c.chan]) {
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rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
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} else {
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if (isOutputL[ops==4][chan[c.chan].state.alg][i] || c.chan>melodicChans) {
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if (KVSL(c.chan,i) || c.chan>melodicChans) {
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rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[c.chan].outVol&0x3f,63))|(op.ksl<<6));
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} else {
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rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
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|
|
@ -1059,7 +1066,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
|
|||
if (isMuted[c.chan]) {
|
||||
rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
|
||||
} else {
|
||||
if (isOutputL[ops==4][chan[c.chan].state.alg][c.value] || c.chan>melodicChans) {
|
||||
if (KVSL(c.chan,c.value) || c.chan>melodicChans) {
|
||||
rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[c.chan].outVol&0x3f,63))|(op.ksl<<6));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
|
||||
|
|
@ -1289,7 +1296,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
|
|||
if (isMuted[c.chan]) {
|
||||
rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
|
||||
} else {
|
||||
if (isOutputL[ops==4][chan[c.chan].state.alg][i] || c.chan>melodicChans) {
|
||||
if (KVSL(c.chan,i) || c.chan>melodicChans) {
|
||||
rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[c.chan].outVol&0x3f,63))|(op.ksl<<6));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
|
||||
|
|
@ -1306,7 +1313,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
|
|||
if (isMuted[c.chan]) {
|
||||
rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
|
||||
} else {
|
||||
if (isOutputL[ops==4][chan[c.chan].state.alg][c.value] || c.chan>melodicChans) {
|
||||
if (KVSL(c.chan,c.value) || c.chan>melodicChans) {
|
||||
rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[c.chan].outVol&0x3f,63))|(op.ksl<<6));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
|
||||
|
|
@ -1383,7 +1390,7 @@ void DivPlatformOPL::forceIns() {
|
|||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
|
||||
} else {
|
||||
if (isOutputL[ops==4][chan[i].state.alg][j] || i>melodicChans) {
|
||||
if (KVSL(i,j) || i>melodicChans) {
|
||||
rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[i].outVol&0x3f,63))|(op.ksl<<6));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
|
||||
|
|
@ -1432,6 +1439,15 @@ DivMacroInt* DivPlatformOPL::getChanMacroInt(int ch) {
|
|||
|
||||
DivDispatchOscBuffer* DivPlatformOPL::getOscBuffer(int ch) {
|
||||
if (ch>=18) return NULL;
|
||||
if (oplType==3 && ch<12) {
|
||||
if (chan[ch&(~1)].fourOp) {
|
||||
if (ch&1) {
|
||||
return oscBuf[ch-1];
|
||||
} else {
|
||||
return oscBuf[ch+1];
|
||||
}
|
||||
}
|
||||
}
|
||||
return oscBuf[ch];
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -78,7 +78,7 @@ void DivPlatformSMS::acquire_nuked(short* bufL, short* bufR, size_t start, size_
|
|||
if (isMuted[i]) {
|
||||
oscBuf[i]->data[oscBuf[i]->needle++]=0;
|
||||
} else {
|
||||
oscBuf[i]->data[oscBuf[i]->needle++]=sn_nuked.vol_table[sn_nuked.volume_out[i]];
|
||||
oscBuf[i]->data[oscBuf[i]->needle++]=sn_nuked.vol_table[sn_nuked.volume_out[i]]*3;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -104,7 +104,7 @@ void DivPlatformSMS::acquire_mame(short* bufL, short* bufR, size_t start, size_t
|
|||
if (isMuted[i]) {
|
||||
oscBuf[i]->data[oscBuf[i]->needle++]=0;
|
||||
} else {
|
||||
oscBuf[i]->data[oscBuf[i]->needle++]=sn->get_channel_output(i);
|
||||
oscBuf[i]->data[oscBuf[i]->needle++]=sn->get_channel_output(i)*3;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -112,7 +112,7 @@ void DivPlatformTX81Z::tick(bool sysTick) {
|
|||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -179,7 +179,7 @@ void DivPlatformTX81Z::tick(bool sysTick) {
|
|||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -232,7 +232,7 @@ void DivPlatformTX81Z::tick(bool sysTick) {
|
|||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -324,7 +324,7 @@ void DivPlatformTX81Z::muteChannel(int ch, bool mute) {
|
|||
if (isMuted[ch]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[ch].state.alg][i]) {
|
||||
if (KVS(ch,i)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[ch].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -353,7 +353,7 @@ int DivPlatformTX81Z::dispatch(DivCommand c) {
|
|||
if (isMuted[c.chan]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[c.chan].state.alg][i]) {
|
||||
if (KVS(c.chan,i)) {
|
||||
if (!chan[c.chan].active || chan[c.chan].insChanged) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
||||
}
|
||||
|
|
@ -419,7 +419,7 @@ int DivPlatformTX81Z::dispatch(DivCommand c) {
|
|||
if (isMuted[c.chan]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[c.chan].state.alg][i]) {
|
||||
if (KVS(c.chan,i)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -519,7 +519,7 @@ int DivPlatformTX81Z::dispatch(DivCommand c) {
|
|||
if (isMuted[c.chan]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[c.chan].state.alg][c.value]) {
|
||||
if (KVS(c.chan,c.value)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -811,7 +811,7 @@ void DivPlatformTX81Z::forceIns() {
|
|||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
|
|||
|
|
@ -220,7 +220,7 @@ void DivPlatformYM2203::tick(bool sysTick) {
|
|||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -261,7 +261,7 @@ void DivPlatformYM2203::tick(bool sysTick) {
|
|||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -310,7 +310,7 @@ void DivPlatformYM2203::tick(bool sysTick) {
|
|||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -427,7 +427,7 @@ int DivPlatformYM2203::dispatch(DivCommand c) {
|
|||
if (isMuted[c.chan]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[c.chan].state.alg][i]) {
|
||||
if (KVS(c.chan,i)) {
|
||||
if (!chan[c.chan].active || chan[c.chan].insChanged) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
||||
}
|
||||
|
|
@ -487,7 +487,7 @@ int DivPlatformYM2203::dispatch(DivCommand c) {
|
|||
if (isMuted[c.chan]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[c.chan].state.alg][i]) {
|
||||
if (KVS(c.chan,i)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -572,7 +572,7 @@ int DivPlatformYM2203::dispatch(DivCommand c) {
|
|||
if (isMuted[c.chan]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[c.chan].state.alg][c.value]) {
|
||||
if (KVS(c.chan,c.value)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -764,7 +764,7 @@ void DivPlatformYM2203::muteChannel(int ch, bool mute) {
|
|||
if (isMuted[ch]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[ch].state.alg][j]) {
|
||||
if (KVS(ch,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[ch].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -781,7 +781,7 @@ void DivPlatformYM2203::forceIns() {
|
|||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
|
|||
|
|
@ -442,7 +442,7 @@ void DivPlatformYM2203Ext::forceIns() {
|
|||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
|
|||
|
|
@ -376,7 +376,7 @@ void DivPlatformYM2608::tick(bool sysTick) {
|
|||
for (int j=0; j<4; j++) {
|
||||
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
||||
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -421,7 +421,7 @@ void DivPlatformYM2608::tick(bool sysTick) {
|
|||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -475,7 +475,7 @@ void DivPlatformYM2608::tick(bool sysTick) {
|
|||
}
|
||||
if (m.tl.had) {
|
||||
op.tl=127-m.tl.val;
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -781,7 +781,7 @@ int DivPlatformYM2608::dispatch(DivCommand c) {
|
|||
for (int i=0; i<4; i++) {
|
||||
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
||||
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
||||
if (isOutput[chan[c.chan].state.alg][i]) {
|
||||
if (KVS(c.chan,i)) {
|
||||
if (!chan[c.chan].active || chan[c.chan].insChanged) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
||||
}
|
||||
|
|
@ -846,7 +846,7 @@ int DivPlatformYM2608::dispatch(DivCommand c) {
|
|||
for (int i=0; i<4; i++) {
|
||||
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
||||
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
||||
if (isOutput[chan[c.chan].state.alg][i]) {
|
||||
if (KVS(c.chan,i)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -957,7 +957,7 @@ int DivPlatformYM2608::dispatch(DivCommand c) {
|
|||
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
||||
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
||||
op.tl=c.value2;
|
||||
if (isOutput[chan[c.chan].state.alg][c.value]) {
|
||||
if (KVS(c.chan,c.value)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -1160,7 +1160,7 @@ void DivPlatformYM2608::forceIns() {
|
|||
for (int j=0; j<4; j++) {
|
||||
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
||||
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -1181,6 +1181,11 @@ void DivPlatformYM2608::forceIns() {
|
|||
}
|
||||
for (int i=9; i<16; i++) {
|
||||
chan[i].insChanged=true;
|
||||
if (i>14) { // ADPCM-B
|
||||
immWrite(0x10b,chan[i].outVol);
|
||||
} else {
|
||||
immWrite(0x18+(i-9),isMuted[i]?0:((chan[i].pan<<6)|chan[i].vol));
|
||||
}
|
||||
}
|
||||
|
||||
ay->forceIns();
|
||||
|
|
|
|||
|
|
@ -442,7 +442,7 @@ void DivPlatformYM2608Ext::forceIns() {
|
|||
if (i==2) { // extended channel
|
||||
if (isOpMuted[j]) {
|
||||
rWrite(baseAddr+0x40,127);
|
||||
} else if (isOutput[chan[i].state.alg][j]) {
|
||||
} else if (KVS(i,j)) {
|
||||
rWrite(baseAddr+0x40,127-VOL_SCALE_LOG(127-op.tl,opChan[j].vol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+0x40,op.tl);
|
||||
|
|
@ -451,7 +451,7 @@ void DivPlatformYM2608Ext::forceIns() {
|
|||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -472,8 +472,13 @@ void DivPlatformYM2608Ext::forceIns() {
|
|||
chan[i].freqChanged=true;
|
||||
}
|
||||
}
|
||||
for (int i=6; i<16; i++) {
|
||||
for (int i=9; i<16; i++) {
|
||||
chan[i].insChanged=true;
|
||||
if (i>14) { // ADPCM-B
|
||||
immWrite(0x10b,chan[i].outVol);
|
||||
} else {
|
||||
immWrite(0x18+(i-9),isMuted[i]?0:((chan[i].pan<<6)|chan[i].vol));
|
||||
}
|
||||
}
|
||||
ay->forceIns();
|
||||
ay->flushWrites();
|
||||
|
|
|
|||
|
|
@ -313,7 +313,7 @@ void DivPlatformYM2610::tick(bool sysTick) {
|
|||
for (int j=0; j<4; j++) {
|
||||
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
||||
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -358,7 +358,7 @@ void DivPlatformYM2610::tick(bool sysTick) {
|
|||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -412,7 +412,7 @@ void DivPlatformYM2610::tick(bool sysTick) {
|
|||
}
|
||||
if (m.tl.had) {
|
||||
op.tl=127-m.tl.val;
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -764,7 +764,7 @@ int DivPlatformYM2610::dispatch(DivCommand c) {
|
|||
for (int i=0; i<4; i++) {
|
||||
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
||||
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
||||
if (isOutput[chan[c.chan].state.alg][i]) {
|
||||
if (KVS(c.chan,i)) {
|
||||
if (!chan[c.chan].active || chan[c.chan].insChanged) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
||||
}
|
||||
|
|
@ -829,7 +829,7 @@ int DivPlatformYM2610::dispatch(DivCommand c) {
|
|||
for (int i=0; i<4; i++) {
|
||||
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
||||
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
||||
if (isOutput[chan[c.chan].state.alg][i]) {
|
||||
if (KVS(c.chan,i)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -947,7 +947,7 @@ int DivPlatformYM2610::dispatch(DivCommand c) {
|
|||
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
||||
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
||||
op.tl=c.value2;
|
||||
if (isOutput[chan[c.chan].state.alg][c.value]) {
|
||||
if (KVS(c.chan,c.value)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -1143,7 +1143,7 @@ void DivPlatformYM2610::forceIns() {
|
|||
for (int j=0; j<4; j++) {
|
||||
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
||||
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
|
|||
|
|
@ -376,7 +376,7 @@ void DivPlatformYM2610B::tick(bool sysTick) {
|
|||
for (int j=0; j<4; j++) {
|
||||
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
||||
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -421,7 +421,7 @@ void DivPlatformYM2610B::tick(bool sysTick) {
|
|||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -475,7 +475,7 @@ void DivPlatformYM2610B::tick(bool sysTick) {
|
|||
}
|
||||
if (m.tl.had) {
|
||||
op.tl=127-m.tl.val;
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -826,7 +826,7 @@ int DivPlatformYM2610B::dispatch(DivCommand c) {
|
|||
for (int i=0; i<4; i++) {
|
||||
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
||||
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
||||
if (isOutput[chan[c.chan].state.alg][i]) {
|
||||
if (KVS(c.chan,i)) {
|
||||
if (!chan[c.chan].active || chan[c.chan].insChanged) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
||||
}
|
||||
|
|
@ -891,7 +891,7 @@ int DivPlatformYM2610B::dispatch(DivCommand c) {
|
|||
for (int i=0; i<4; i++) {
|
||||
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
||||
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
||||
if (isOutput[chan[c.chan].state.alg][i]) {
|
||||
if (KVS(c.chan,i)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -1009,7 +1009,7 @@ int DivPlatformYM2610B::dispatch(DivCommand c) {
|
|||
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
||||
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
||||
op.tl=c.value2;
|
||||
if (isOutput[chan[c.chan].state.alg][c.value]) {
|
||||
if (KVS(c.chan,c.value)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
@ -1205,7 +1205,7 @@ void DivPlatformYM2610B::forceIns() {
|
|||
for (int j=0; j<4; j++) {
|
||||
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
||||
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
|
|||
|
|
@ -438,7 +438,7 @@ void DivPlatformYM2610BExt::forceIns() {
|
|||
if (i==2 && extMode) { // extended channel
|
||||
if (isOpMuted[j]) {
|
||||
rWrite(baseAddr+0x40,127);
|
||||
} else if (isOutput[chan[i].state.alg][j]) {
|
||||
} else if (KVS(i,j)) {
|
||||
rWrite(baseAddr+0x40,127-VOL_SCALE_LOG(127-op.tl,opChan[j].vol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+0x40,op.tl);
|
||||
|
|
@ -447,7 +447,7 @@ void DivPlatformYM2610BExt::forceIns() {
|
|||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
|
|||
|
|
@ -438,7 +438,7 @@ void DivPlatformYM2610Ext::forceIns() {
|
|||
if (i==1 && extMode) { // extended channel
|
||||
if (isOpMuted[j]) {
|
||||
rWrite(baseAddr+0x40,127);
|
||||
} else if (isOutput[chan[i].state.alg][j]) {
|
||||
} else if (KVS(i,j)) {
|
||||
rWrite(baseAddr+0x40,127-VOL_SCALE_LOG(127-op.tl,opChan[j].vol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+0x40,op.tl);
|
||||
|
|
@ -447,7 +447,7 @@ void DivPlatformYM2610Ext::forceIns() {
|
|||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
if (KVS(i,j)) {
|
||||
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue