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OPLL: 95%

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FM macros working

TODO:
- proper drums
This commit is contained in:
tildearrow 2022-03-01 00:56:13 -05:00
parent 105aed5a50
commit d9ae033f32
4 changed files with 167 additions and 72 deletions
Download patch file Download diff file Expand all files Collapse all files

52
src/engine/macroInt.cpp
View file

@ -44,6 +44,7 @@
} \
}
// CPU hell
void DivMacroInt::next() {
if (ins==NULL) return;
@ -79,6 +80,16 @@ void DivMacroInt::next() {
doMacro(o.finishedDt,o.hadDt,o.hasDt,o.dt,o.dtPos,m.dtMacro,m.dtMacroLen,m.dtMacroLoop,m.dtMacroRel);
doMacro(o.finishedD2r,o.hadD2r,o.hasD2r,o.d2r,o.d2rPos,m.d2rMacro,m.d2rMacroLen,m.d2rMacroLoop,m.d2rMacroRel);
doMacro(o.finishedSsg,o.hadSsg,o.hasSsg,o.ssg,o.ssgPos,m.ssgMacro,m.ssgMacroLen,m.ssgMacroLoop,m.ssgMacroRel);
doMacro(o.finishedDam,o.hadDam,o.hasDam,o.dam,o.damPos,m.damMacro,m.damMacroLen,m.damMacroLoop,m.damMacroRel);
doMacro(o.finishedDvb,o.hadDvb,o.hasDvb,o.dvb,o.dvbPos,m.dvbMacro,m.dvbMacroLen,m.dvbMacroLoop,m.dvbMacroRel);
doMacro(o.finishedEgt,o.hadEgt,o.hasEgt,o.egt,o.egtPos,m.egtMacro,m.egtMacroLen,m.egtMacroLoop,m.egtMacroRel);
doMacro(o.finishedKsl,o.hadKsl,o.hasKsl,o.ksl,o.kslPos,m.kslMacro,m.kslMacroLen,m.kslMacroLoop,m.kslMacroRel);
doMacro(o.finishedSus,o.hadSus,o.hasSus,o.sus,o.susPos,m.susMacro,m.susMacroLen,m.susMacroLoop,m.susMacroRel);
doMacro(o.finishedVib,o.hadVib,o.hasVib,o.vib,o.vibPos,m.vibMacro,m.vibMacroLen,m.vibMacroLoop,m.vibMacroRel);
doMacro(o.finishedWs,o.hadWs,o.hasWs,o.ws,o.wsPos,m.wsMacro,m.wsMacroLen,m.wsMacroLoop,m.wsMacroRel);
doMacro(o.finishedKsr,o.hadKsr,o.hasKsr,o.ksr,o.ksrPos,m.ksrMacro,m.ksrMacroLen,m.ksrMacroLoop,m.ksrMacroRel);
}
}
@ -280,6 +291,47 @@ void DivMacroInt::init(DivInstrument* which) {
o.hasSsg=true;
o.willSsg=true;
}
if (m.damMacroLen>0) {
o.hadDam=true;
o.hasDam=true;
o.willDam=true;
}
if (m.dvbMacroLen>0) {
o.hadDvb=true;
o.hasDvb=true;
o.willDvb=true;
}
if (m.egtMacroLen>0) {
o.hadEgt=true;
o.hasEgt=true;
o.willEgt=true;
}
if (m.kslMacroLen>0) {
o.hadKsl=true;
o.hasKsl=true;
o.willKsl=true;
}
if (m.susMacroLen>0) {
o.hadSus=true;
o.hasSus=true;
o.willSus=true;
}
if (m.vibMacroLen>0) {
o.hadVib=true;
o.hasVib=true;
o.willVib=true;
}
if (m.wsMacroLen>0) {
o.hadWs=true;
o.hasWs=true;
o.willWs=true;
}
if (m.ksrMacroLen>0) {
o.hadKsr=true;
o.hasKsr=true;
o.willKsr=true;
}
}
}

38
src/engine/macroInt.h
View file

@ -42,26 +42,38 @@ class DivMacroInt {
int amPos, arPos, drPos, multPos;
int rrPos, slPos, tlPos, dt2Pos;
int rsPos, dtPos, d2rPos, ssgPos;
int damPos, dvbPos, egtPos, kslPos;
int susPos, vibPos, wsPos, ksrPos;
int am, ar, dr, mult;
int rr, sl, tl, dt2;
int rs, dt, d2r, ssg;
int dam, dvb, egt, ksl;
int sus, vib, ws, ksr;
bool hasAm, hasAr, hasDr, hasMult;
bool hasRr, hasSl, hasTl, hasDt2;
bool hasRs, hasDt, hasD2r, hasSsg;
bool hasDam, hasDvb, hasEgt, hasKsl;
bool hasSus, hasVib, hasWs, hasKsr;
bool hadAm, hadAr, hadDr, hadMult;
bool hadRr, hadSl, hadTl, hadDt2;
bool hadRs, hadDt, hadD2r, hadSsg;
bool hadDam, hadDvb, hadEgt, hadKsl;
bool hadSus, hadVib, hadWs, hadKsr;
bool finishedAm, finishedAr, finishedDr, finishedMult;
bool finishedRr, finishedSl, finishedTl, finishedDt2;
bool finishedRs, finishedDt, finishedD2r, finishedSsg;
bool finishedDam, finishedDvb, finishedEgt, finishedKsl;
bool finishedSus, finishedVib, finishedWs, finishedKsr;
bool willAm, willAr, willDr, willMult;
bool willRr, willSl, willTl, willDt2;
bool willRs, willDt, willD2r, willSsg;
bool willDam, willDvb, willEgt, willKsl;
bool willSus, willVib, willWs, willKsr;
IntOp():
amPos(0),
arPos(0),
@ -75,6 +87,14 @@ class DivMacroInt {
dtPos(0),
d2rPos(0),
ssgPos(0),
damPos(0),
dvbPos(0),
egtPos(0),
kslPos(0),
susPos(0),
vibPos(0),
wsPos(0),
ksrPos(0),
am(0),
ar(0),
dr(0),
@ -87,18 +107,34 @@ class DivMacroInt {
dt(0),
d2r(0),
ssg(0),
dam(0),
dvb(0),
egt(0),
ksl(0),
sus(0),
vib(0),
ws(0),
ksr(0),
hasAm(false), hasAr(false), hasDr(false), hasMult(false),
hasRr(false), hasSl(false), hasTl(false), hasDt2(false),
hasRs(false), hasDt(false), hasD2r(false), hasSsg(false),
hasDam(false), hasDvb(false), hasEgt(false), hasKsl(false),
hasSus(false), hasVib(false), hasWs(false), hasKsr(false),
hadAm(false), hadAr(false), hadDr(false), hadMult(false),
hadRr(false), hadSl(false), hadTl(false), hadDt2(false),
hadRs(false), hadDt(false), hadD2r(false), hadSsg(false),
hadDam(false), hadDvb(false), hadEgt(false), hadKsl(false),
hadSus(false), hadVib(false), hadWs(false), hadKsr(false),
finishedAm(false), finishedAr(false), finishedDr(false), finishedMult(false),
finishedRr(false), finishedSl(false), finishedTl(false), finishedDt2(false),
finishedRs(false), finishedDt(false), finishedD2r(false), finishedSsg(false),
finishedDam(false), finishedDvb(false), finishedEgt(false), finishedKsl(false),
finishedSus(false), finishedVib(false), finishedWs(false), finishedKsr(false),
willAm(false), willAr(false), willDr(false), willMult(false),
willRr(false), willSl(false), willTl(false), willDt2(false),
willRs(false), willDt(false), willD2r(false), willSsg(false) {}
willRs(false), willDt(false), willD2r(false), willSsg(false),
willDam(false), willDvb(false), willEgt(false), willKsl(false),
willSus(false), willVib(false), willWs(false), willKsr(false) {}
} op[4];
void release();
void next();

135
src/engine/platform/opll.cpp
View file

@ -128,7 +128,7 @@ void DivPlatformOPLL::tick() {
chan[i].std.next();
if (chan[i].std.hadVol) {
chan[i].outVol=(chan[i].vol*MIN(127,chan[i].std.vol))/127;
chan[i].outVol=(chan[i].vol*MIN(15,chan[i].std.vol))/15;
rWrite(0x30+i,(15-(chan[i].outVol*(15-chan[i].state.op[1].tl))/15)|(chan[i].state.opllPreset<<4));
}
@ -147,77 +147,84 @@ void DivPlatformOPLL::tick() {
chan[i].freqChanged=true;
}
}
/*
if (chan[i].std.hadAlg) {
chan[i].state.alg=chan[i].std.alg;
rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
}
if (chan[i].std.hadFb) {
chan[i].state.fb=chan[i].std.fb;
}
if (chan[i].std.hadFms) {
chan[i].state.fms=chan[i].std.fms;
}
if (chan[i].std.hadAms) {
chan[i].state.ams=chan[i].std.ams;
}
for (int j=0; j<2; j++) {
unsigned short baseAddr=chanOffs[i]|opOffs[j];
DivInstrumentFM::Operator& op=chan[i].state.op[j];
DivMacroInt::IntOp& m=chan[i].std.op[j];
if (m.hadAm) {
op.am=m.am;
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
if (chan[i].state.opllPreset==0) {
if (chan[i].std.hadAlg) { // SUS
chan[i].state.alg=chan[i].std.alg;
chan[i].freqChanged=true;
}
if (m.hadAr) {
op.ar=m.ar;
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
if (chan[i].std.hadFb) {
chan[i].state.fb=chan[i].std.fb;
rWrite(0x03,(chan[i].state.op[0].ksl<<6)|((chan[i].state.fms&1)<<4)|((chan[i].state.ams&1)<<3)|chan[i].state.fb);
}
if (m.hadDr) {
op.dr=m.dr;
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
if (chan[i].std.hadFms) {
chan[i].state.fms=chan[i].std.fms;
rWrite(0x03,(chan[i].state.op[0].ksl<<6)|((chan[i].state.fms&1)<<4)|((chan[i].state.ams&1)<<3)|chan[i].state.fb);
}
if (m.hadMult) {
op.mult=m.mult;
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
if (chan[i].std.hadAms) {
chan[i].state.ams=chan[i].std.ams;
rWrite(0x03,(chan[i].state.op[0].ksl<<6)|((chan[i].state.fms&1)<<4)|((chan[i].state.ams&1)<<3)|chan[i].state.fb);
}
if (m.hadRr) {
op.rr=m.rr;
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
}
if (m.hadSl) {
op.sl=m.sl;
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
}
if (m.hadTl) {
op.tl=127-m.tl;
if (isMuted[i]) {
rWrite(baseAddr+ADDR_TL,127);
} else {
if (isOutput[chan[i].state.alg][j]) {
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
for (int j=0; j<2; j++) {
DivInstrumentFM::Operator& op=chan[i].state.op[j];
DivMacroInt::IntOp& m=chan[i].std.op[j];
if (m.hadAm) {
op.am=m.am;
rWrite(0x00+j,(op.am<<7)|(op.vib<<6)|((op.ssgEnv&8)<<2)|(op.ksr<<4)|(op.mult));
}
if (m.hadAr) {
op.ar=m.ar;
rWrite(0x04+j,(op.ar<<4)|(op.dr));
}
if (m.hadDr) {
op.dr=m.dr;
rWrite(0x04+j,(op.ar<<4)|(op.dr));
}
if (m.hadMult) {
op.mult=m.mult;
rWrite(0x00+j,(op.am<<7)|(op.vib<<6)|((op.ssgEnv&8)<<2)|(op.ksr<<4)|(op.mult));
}
if (m.hadRr) {
op.rr=m.rr;
rWrite(0x06+j,(op.sl<<4)|(op.rr));
}
if (m.hadSl) {
op.sl=m.sl;
rWrite(0x06+j,(op.sl<<4)|(op.rr));
}
if (m.hadTl) {
op.tl=((j==1)?15:63)-m.tl;
if (j==1) {
rWrite(0x30+i,(15-(chan[i].outVol*(15-chan[i].state.op[1].tl))/15)|(chan[i].state.opllPreset<<4));
} else {
rWrite(baseAddr+ADDR_TL,op.tl);
rWrite(0x02,(chan[i].state.op[1].ksl<<6)|(op.tl&63));
}
}
if (m.hadEgt) {
op.ssgEnv=(m.egt&1)?8:0;
rWrite(0x00+j,(op.am<<7)|(op.vib<<6)|((op.ssgEnv&8)<<2)|(op.ksr<<4)|(op.mult));
}
if (m.hadKsl) {
op.ksl=m.ksl;
if (j==1) {
rWrite(0x02,(op.ksl<<6)|(chan[i].state.op[0].tl&63));
} else {
rWrite(0x03,(chan[i].state.op[0].ksl<<6)|((chan[i].state.fms&1)<<4)|((chan[i].state.ams&1)<<3)|chan[i].state.fb);
}
}
if (m.hadKsr) {
op.ksr=m.ksr;
rWrite(0x00+j,(op.am<<7)|(op.vib<<6)|((op.ssgEnv&8)<<2)|(op.ksr<<4)|(op.mult));
}
if (m.hadVib) {
op.vib=m.vib;
rWrite(0x00+j,(op.am<<7)|(op.vib<<6)|((op.ssgEnv&8)<<2)|(op.ksr<<4)|(op.mult));
}
}
if (m.hadRs) {
op.rs=m.rs;
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
}
if (m.hadDt) {
op.dt=m.dt;
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
}
if (m.hadD2r) {
op.d2r=m.d2r;
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
}
if (m.hadSsg) {
op.ssgEnv=m.ssg;
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
}
}*/
}
if (chan[i].keyOn || chan[i].keyOff) {
if (i>=6 && drums) {