Genesis: separate channel state from instrument
paves way for FM macros with this change, extended channel 3 mode breaks! do not use until I diagnose the problem.
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parent
c5956b939e
commit
d62b111c78
6 changed files with 97 additions and 59 deletions
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@ -100,8 +100,8 @@ void DivPlatformGenesis::tick() {
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if (chan[i].freqChanged) {
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chan[i].freq=parent->calcFreq(chan[i].baseFreq,chan[i].pitch);
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int freqt=toFreq(chan[i].freq);
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immWrite(chanOffs[i]+0xa4,freqt>>8);
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immWrite(chanOffs[i]+0xa0,freqt&0xff);
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immWrite(chanOffs[i]+ADDR_FREQH,freqt>>8);
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immWrite(chanOffs[i]+ADDR_FREQ,freqt&0xff);
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if (chan[i].furnaceDac) {
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dacRate=(1280000*1.25)/chan[i].baseFreq;
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}
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@ -163,8 +163,7 @@ void DivPlatformGenesis::muteChannel(int ch, bool mute) {
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return;
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}
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isMuted[ch]=mute;
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DivInstrument* ins=parent->getIns(chan[ch].ins);
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rWrite(chanOffs[ch]+0xb4,(isMuted[ch]?0:(chan[ch].pan<<6))|(ins->fm.fms&7)|((ins->fm.ams&3)<<4));
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rWrite(chanOffs[ch]+ADDR_LRAF,(isMuted[ch]?0:(chan[ch].pan<<6))|(chan[ch].state.fms&7)|((chan[ch].state.ams&3)<<4));
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}
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int DivPlatformGenesis::dispatch(DivCommand c) {
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@ -209,32 +208,36 @@ int DivPlatformGenesis::dispatch(DivCommand c) {
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chan[c.chan].furnaceDac=false;
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}
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break;
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}
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}
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if (chan[c.chan].insChanged) {
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chan[c.chan].state=ins->fm;
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}
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for (int i=0; i<4; i++) {
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
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DivInstrumentFM::Operator op=ins->fm.op[i];
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if (isOutput[ins->fm.alg][i]) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
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if (isOutput[chan[c.chan].state.alg][i]) {
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if (!chan[c.chan].active || chan[c.chan].insChanged) {
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rWrite(baseAddr+0x40,127-(((127-op.tl)*(chan[c.chan].vol&0x7f))/127));
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[c.chan].vol&0x7f))/127));
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}
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} else {
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if (chan[c.chan].insChanged) {
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rWrite(baseAddr+0x40,op.tl);
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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}
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if (chan[c.chan].insChanged) {
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rWrite(baseAddr+0x30,(op.mult&15)|(dtTable[op.dt&7]<<4));
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rWrite(baseAddr+0x50,(op.ar&31)|(op.rs<<6));
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rWrite(baseAddr+0x60,(op.dr&31)|(op.am<<7));
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rWrite(baseAddr+0x70,op.d2r&31);
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rWrite(baseAddr+0x80,(op.rr&15)|(op.sl<<4));
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rWrite(baseAddr+0x90,op.ssgEnv&15);
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rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
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rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
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rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
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rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
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rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
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}
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}
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if (chan[c.chan].insChanged) {
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rWrite(chanOffs[c.chan]+0xb0,(ins->fm.alg&7)|(ins->fm.fb<<3));
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rWrite(chanOffs[c.chan]+0xb4,(isMuted[c.chan]?0:(chan[c.chan].pan<<6))|(ins->fm.fms&7)|((ins->fm.ams&3)<<4));
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rWrite(chanOffs[c.chan]+ADDR_FB_ALG,(chan[c.chan].state.alg&7)|(chan[c.chan].state.fb<<3));
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rWrite(chanOffs[c.chan]+ADDR_LRAF,(isMuted[c.chan]?0:(chan[c.chan].pan<<6))|(chan[c.chan].state.fms&7)|((chan[c.chan].state.ams&3)<<4));
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}
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chan[c.chan].insChanged=false;
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@ -255,14 +258,13 @@ int DivPlatformGenesis::dispatch(DivCommand c) {
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break;
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case DIV_CMD_VOLUME: {
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chan[c.chan].vol=c.value;
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DivInstrument* ins=parent->getIns(chan[c.chan].ins);
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for (int i=0; i<4; i++) {
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
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DivInstrumentFM::Operator op=ins->fm.op[i];
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if (isOutput[ins->fm.alg][i]) {
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rWrite(baseAddr+0x40,127-(((127-op.tl)*(chan[c.chan].vol&0x7f))/127));
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
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if (isOutput[chan[c.chan].state.alg][i]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[c.chan].vol&0x7f))/127));
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} else {
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rWrite(baseAddr+0x40,op.tl);
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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}
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break;
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@ -289,8 +291,7 @@ int DivPlatformGenesis::dispatch(DivCommand c) {
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chan[c.chan].pan=3;
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break;
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}
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DivInstrument* ins=parent->getIns(chan[c.chan].ins);
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rWrite(chanOffs[c.chan]+0xb4,(isMuted[c.chan]?0:(chan[c.chan].pan<<6))|(ins->fm.fms&7)|((ins->fm.ams&3)<<4));
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rWrite(chanOffs[c.chan]+ADDR_LRAF,(isMuted[c.chan]?0:(chan[c.chan].pan<<6))|(chan[c.chan].state.fms&7)|((chan[c.chan].state.ams&3)<<4));
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break;
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}
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case DIV_CMD_PITCH: {
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@ -349,33 +350,35 @@ int DivPlatformGenesis::dispatch(DivCommand c) {
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}
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case DIV_CMD_FM_MULT: {
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
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DivInstrument* ins=parent->getIns(chan[c.chan].ins);
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DivInstrumentFM::Operator op=ins->fm.op[orderedOps[c.value]];
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rWrite(baseAddr+0x30,(c.value2&15)|(dtTable[op.dt&7]<<4));
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
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op.mult=c.value2&15;
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rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
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break;
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}
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case DIV_CMD_FM_TL: {
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
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DivInstrument* ins=parent->getIns(chan[c.chan].ins);
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if (isOutput[ins->fm.alg][c.value]) {
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rWrite(baseAddr+0x40,127-(((127-c.value2)*(chan[c.chan].vol&0x7f))/127));
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
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op.tl=c.value2;
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if (isOutput[chan[c.chan].state.alg][c.value]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[c.chan].vol&0x7f))/127));
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} else {
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rWrite(baseAddr+0x40,c.value2);
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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break;
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}
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case DIV_CMD_FM_AR: {
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DivInstrument* ins=parent->getIns(chan[c.chan].ins);
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if (c.value<0) {
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for (int i=0; i<4; i++) {
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DivInstrumentFM::Operator op=ins->fm.op[i];
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
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op.ar=c.value2&31;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
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rWrite(baseAddr+0x50,(c.value2&31)|(op.rs<<6));
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rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
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}
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} else {
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DivInstrumentFM::Operator op=ins->fm.op[orderedOps[c.value]];
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
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op.ar=c.value2&31;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
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rWrite(baseAddr+0x50,(c.value2&31)|(op.rs<<6));
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rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
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}
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break;
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