diff --git a/src/engine/platform/genesisext.cpp b/src/engine/platform/genesisext.cpp
index 42e31b8b9..5c9d986a4 100644
--- a/src/engine/platform/genesisext.cpp
+++ b/src/engine/platform/genesisext.cpp
@@ -651,10 +651,10 @@ void DivPlatformGenesisExt::forceIns() {
       unsigned short baseAddr=chanOffs[i]|opOffs[j];
       DivInstrumentFM::Operator& op=chan[i].state.op[j];
       if (i==2 && extMode) { // extended channel
-        if (isOpMuted[j]) {
+        if (isOpMuted[orderedOps[j]]) {
           rWrite(baseAddr+0x40,127);
         } else if (KVS(i,j)) {
-          rWrite(baseAddr+0x40,127-VOL_SCALE_LOG_BROKEN(127-op.tl,opChan[j].outVol&0x7f,127));
+          rWrite(baseAddr+0x40,127-VOL_SCALE_LOG_BROKEN(127-op.tl,opChan[orderedOps[j]].outVol&0x7f,127));
         } else {
           rWrite(baseAddr+0x40,op.tl);
         }
diff --git a/src/engine/platform/ym2203ext.cpp b/src/engine/platform/ym2203ext.cpp
index 441ec7018..c14be9dc7 100644
--- a/src/engine/platform/ym2203ext.cpp
+++ b/src/engine/platform/ym2203ext.cpp
@@ -558,10 +558,10 @@ void DivPlatformYM2203Ext::forceIns() {
       unsigned short baseAddr=chanOffs[i]|opOffs[j];
       DivInstrumentFM::Operator& op=chan[i].state.op[j];
       if (i==2 && extMode) { // extended channel
-        if (isOpMuted[j]) {
+        if (isOpMuted[orderedOps[j]]) {
           rWrite(baseAddr+0x40,127);
         } else if (KVS(i,j)) {
-          rWrite(baseAddr+0x40,127-VOL_SCALE_LOG_BROKEN(127-op.tl,opChan[j].outVol&0x7f,127));
+          rWrite(baseAddr+0x40,127-VOL_SCALE_LOG_BROKEN(127-op.tl,opChan[orderedOps[j]].outVol&0x7f,127));
         } else {
           rWrite(baseAddr+0x40,op.tl);
         }
diff --git a/src/engine/platform/ym2608ext.cpp b/src/engine/platform/ym2608ext.cpp
index 3a56a167b..96409ce76 100644
--- a/src/engine/platform/ym2608ext.cpp
+++ b/src/engine/platform/ym2608ext.cpp
@@ -582,10 +582,10 @@ void DivPlatformYM2608Ext::forceIns() {
       unsigned short baseAddr=chanOffs[i]|opOffs[j];
       DivInstrumentFM::Operator& op=chan[i].state.op[j];
       if (i==2 && extMode) { // extended channel
-        if (isOpMuted[j]) {
+        if (isOpMuted[orderedOps[j]]) {
           rWrite(baseAddr+0x40,127);
         } else if (KVS(i,j)) {
-          rWrite(baseAddr+0x40,127-VOL_SCALE_LOG_BROKEN(127-op.tl,opChan[j].outVol&0x7f,127));
+          rWrite(baseAddr+0x40,127-VOL_SCALE_LOG_BROKEN(127-op.tl,opChan[orderedOps[j]].outVol&0x7f,127));
         } else {
           rWrite(baseAddr+0x40,op.tl);
         }
diff --git a/src/engine/platform/ym2610bext.cpp b/src/engine/platform/ym2610bext.cpp
index 0d113d052..e025ec2fa 100644
--- a/src/engine/platform/ym2610bext.cpp
+++ b/src/engine/platform/ym2610bext.cpp
@@ -578,10 +578,10 @@ void DivPlatformYM2610BExt::forceIns() {
       unsigned short baseAddr=chanOffs[i]|opOffs[j];
       DivInstrumentFM::Operator& op=chan[i].state.op[j];
       if (i==extChanOffs && extMode) { // extended channel
-        if (isOpMuted[j]) {
+        if (isOpMuted[orderedOps[j]]) {
           rWrite(baseAddr+0x40,127);
         } else if (KVS(i,j)) {
-          rWrite(baseAddr+0x40,127-VOL_SCALE_LOG_BROKEN(127-op.tl,opChan[j].outVol&0x7f,127));
+          rWrite(baseAddr+0x40,127-VOL_SCALE_LOG_BROKEN(127-op.tl,opChan[orderedOps[j]].outVol&0x7f,127));
         } else {
           rWrite(baseAddr+0x40,op.tl);
         }
diff --git a/src/engine/platform/ym2610ext.cpp b/src/engine/platform/ym2610ext.cpp
index e8a531dae..ccb877483 100644
--- a/src/engine/platform/ym2610ext.cpp
+++ b/src/engine/platform/ym2610ext.cpp
@@ -578,10 +578,10 @@ void DivPlatformYM2610Ext::forceIns() {
       unsigned short baseAddr=chanOffs[i]|opOffs[j];
       DivInstrumentFM::Operator& op=chan[i].state.op[j];
       if (i==extChanOffs && extMode) { // extended channel
-        if (isOpMuted[j]) {
+        if (isOpMuted[orderedOps[j]]) {
           rWrite(baseAddr+0x40,127);
         } else if (KVS(i,j)) {
-          rWrite(baseAddr+0x40,127-VOL_SCALE_LOG_BROKEN(127-op.tl,opChan[j].outVol&0x7f,127));
+          rWrite(baseAddr+0x40,127-VOL_SCALE_LOG_BROKEN(127-op.tl,opChan[orderedOps[j]].outVol&0x7f,127));
         } else {
           rWrite(baseAddr+0x40,op.tl);
         }