Add compatible flag for Y8950 ADPCM Frequency

This commit is contained in:
cam900 2022-09-24 00:24:30 +09:00
parent a44d696f09
commit b05dafe297
5 changed files with 18 additions and 8 deletions

View file

@ -28,6 +28,8 @@
#define KVSL(x,y) ((chan[x].state.op[orderedOpsL1[ops==4][y]].kvs==2 && isOutputL[ops==4][chan[x].state.alg][y]) || chan[x].state.op[orderedOpsL1[ops==4][y]].kvs==1)
#define OPLPCMDiv (parent->song.newY8950PCMFreq?((oplType==3)?288:72):144)
#define CHIP_FREQBASE chipFreqBase
// N = invalid
@ -274,7 +276,7 @@ double DivPlatformOPL::NOTE_ADPCMB(int note) {
if (adpcmChan<0) return 0;
if (chan[adpcmChan].sample>=0 && chan[adpcmChan].sample<parent->song.sampleLen) {
double off=65535.0*(double)(parent->getSample(chan[adpcmChan].sample)->centerRate)/8363.0;
return parent->calcBaseFreq((double)chipClock/((oplType==3)?288:72),off,note,false);
return parent->calcBaseFreq((double)chipClock/OPLPCMDiv,off,note,false);
}
return 0;
}
@ -504,7 +506,7 @@ void DivPlatformOPL::tick(bool sysTick) {
if (chan[adpcmChan].freqChanged || chan[adpcmChan].keyOn || chan[adpcmChan].keyOff) {
if (chan[adpcmChan].sample>=0 && chan[adpcmChan].sample<parent->song.sampleLen) {
double off=65535.0*(double)(parent->getSample(chan[adpcmChan].sample)->centerRate)/8363.0;
chan[adpcmChan].freq=parent->calcFreq(chan[adpcmChan].baseFreq,chan[adpcmChan].pitch,false,4,chan[adpcmChan].pitch2,(double)chipClock/((oplType==3)?288:72),off);
chan[adpcmChan].freq=parent->calcFreq(chan[adpcmChan].baseFreq,chan[adpcmChan].pitch,false,4,chan[adpcmChan].pitch2,(double)chipClock/OPLPCMDiv,off);
} else {
chan[adpcmChan].freq=0;
}