otomatalabs/furnace
8
0
Fork 0
Code Issues Pull requests Actions Packages Projects Releases Wiki Activity

Update presets.cpp

Browse source
This commit is contained in:
Lunathir 2023-08-03 20:42:44 -07:00 committed by tildearrow
parent 9ba1eb2541
commit 9ae28a67bf
1 changed files with 16 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

20
src/gui/presets.cpp
View file

@ -1407,28 +1407,40 @@ void FurnaceGUI::initSystemPresets() {
"Sega System 32", { "Sega System 32", {
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=4"), // discrete 8.05MHz YM3438 CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=4"), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=4"), // ^^ CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=4"), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0, "clockSel=2") // 12.5MHz CH(DIV_SYSTEM_RF5C68, 1.0f, 0,
"clockSel=2\n",
"chipType=1\n"
) // 12.5MHz
} }
); );
ENTRY( ENTRY(
"Sega System 32 (extended channel 3 on first OPN2C)", { "Sega System 32 (extended channel 3 on first OPN2C)", {
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=4"), // discrete 8.05MHz YM3438 CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=4"), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=4"), // ^^ CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=4"), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0, "clockSel=2") // 12.5MHz CH(DIV_SYSTEM_RF5C68, 1.0f, 0,
"clockSel=2\n",
"chipType=1\n"
) // 12.5MHz
} }
); );
ENTRY( ENTRY(
"Sega System 32 (extended channel 3 on second OPN2C)", { "Sega System 32 (extended channel 3 on second OPN2C)", {
CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=4"), // discrete 8.05MHz YM3438 CH(DIV_SYSTEM_YM2612, 1.0f, 0, "clockSel=4"), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=4"), // ^^ CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=4"), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0, "clockSel=2") // 12.5MHz CH(DIV_SYSTEM_RF5C68, 1.0f, 0,
"clockSel=2\n",
"chipType=1\n"
) // 12.5MHz
} }
); );
ENTRY( ENTRY(
"Sega System 32 (extended channel 3 on both OPN2Cs)", { "Sega System 32 (extended channel 3 on both OPN2Cs)", {
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=4"), // discrete 8.05MHz YM3438 CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=4"), // discrete 8.05MHz YM3438
CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=4"), // ^^ CH(DIV_SYSTEM_YM2612_EXT, 1.0f, 0, "clockSel=4"), // ^^
CH(DIV_SYSTEM_RF5C68, 1.0f, 0, "clockSel=2") // 12.5MHz CH(DIV_SYSTEM_RF5C68, 1.0f, 0,
"clockSel=2\n",
"chipType=1\n"
) // 12.5MHz
} }
); );
ENTRY( ENTRY(