better phase mod accuracy, optimized panning reg writes
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5b92ee0426
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@ -94,7 +94,7 @@ void DivPlatformSID3::acquire(short** buf, size_t len)
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for(int j = 0; j < SID3_NUM_CHANNELS; j++)
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for(int j = 0; j < SID3_NUM_CHANNELS; j++)
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{
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{
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oscBuf[j]->data[oscBuf[j]->needle++] = sid3->muted[j] ? 0 : sid3->channel_output[j];
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oscBuf[j]->data[oscBuf[j]->needle++] = sid3->muted[j] ? 0 : (sid3->channel_output[j] / 4);
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}
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}
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}
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}
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}
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}
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@ -169,6 +169,8 @@ void DivPlatformSID3::tick(bool sysTick)
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{
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{
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chan[i].std.next();
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chan[i].std.next();
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bool panChanged = false;
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if (chan[i].std.vol.had)
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if (chan[i].std.vol.had)
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{
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{
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chan[i].outVol=VOL_SCALE_LINEAR(chan[i].vol&255,MIN(255,chan[i].std.vol.val),255);
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chan[i].outVol=VOL_SCALE_LINEAR(chan[i].vol&255,MIN(255,chan[i].std.vol.val),255);
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@ -202,11 +204,16 @@ void DivPlatformSID3::tick(bool sysTick)
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updateDuty(i);
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updateDuty(i);
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}
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}
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if (chan[i].std.panL.had) {
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if (chan[i].std.panL.had) {
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panChanged = true;
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chan[i].panLeft = chan[i].std.panL.val & 0xff;
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chan[i].panLeft = chan[i].std.panL.val & 0xff;
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updatePanning(i);
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}
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}
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if (chan[i].std.panR.had) {
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if (chan[i].std.panR.had) {
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panChanged = true;
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chan[i].panRight = chan[i].std.panR.val & 0xff;
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chan[i].panRight = chan[i].std.panR.val & 0xff;
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}
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if(panChanged)
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{
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updatePanning(i);
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updatePanning(i);
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}
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}
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@ -2494,7 +2494,7 @@ void sid3_adsr_clock(sid3_channel_adsr* adsr)
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int32_t sid3_adsr_output(sid3_channel_adsr* adsr, int32_t input)
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int32_t sid3_adsr_output(sid3_channel_adsr* adsr, int32_t input)
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{
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{
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return (int32_t)((int64_t)input * (int64_t)adsr->envelope_counter / (int64_t)0xff0000 / (int64_t)8 * (int64_t)adsr->vol / (int64_t)SID3_MAX_VOL); //"/ (int64_t)8" so that there's enough amplitude for all 7 chans!
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return (int32_t)((int64_t)input * (int64_t)adsr->envelope_counter / (int64_t)0xff0000 * (int64_t)adsr->vol / (int64_t)SID3_MAX_VOL);
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}
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}
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void sid3_set_filter_settings(sid3_filter* filt)
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void sid3_set_filter_settings(sid3_filter* filt)
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@ -2931,7 +2931,7 @@ void sid3_clock(SID3* sid3)
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if(ch->flags & SID3_CHAN_ENABLE_PHASE_MOD)
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if(ch->flags & SID3_CHAN_ENABLE_PHASE_MOD)
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{
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{
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ch->accumulator += ch->phase_mod_source == SID3_NUM_CHANNELS - 1 ? ((uint64_t)sid3->wave_channel_output << 19) : ((uint64_t)sid3->channel_output[ch->phase_mod_source] << 19);
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ch->accumulator += ch->phase_mod_source == SID3_NUM_CHANNELS - 1 ? ((uint64_t)sid3->wave_channel_output << 18) : ((uint64_t)sid3->channel_output[ch->phase_mod_source] << 18);
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}
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}
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ch->accumulator &= SID3_ACC_MASK;
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ch->accumulator &= SID3_ACC_MASK;
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@ -2972,8 +2972,8 @@ void sid3_clock(SID3* sid3)
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if(!sid3->muted[i])
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if(!sid3->muted[i])
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{
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{
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sid3->output_l += output * ch->panning_left / 0xff;
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sid3->output_l += output * ch->panning_left / 0x8f0;
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sid3->output_r += output * ch->panning_right / 0xff;
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sid3->output_r += output * ch->panning_right / 0x8f0;
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}
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}
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sid3->channel_output[i] = output;
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sid3->channel_output[i] = output;
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