prepare for AtomicSSG
AY/SSG core extracted from YM2608-LLE
This commit is contained in:
parent
73957ad57d
commit
8db06f359e
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@ -534,6 +534,8 @@ src/engine/platform/sound/nes/mmc5.c
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src/engine/platform/sound/vera_psg.c
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src/engine/platform/sound/vera_psg.c
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src/engine/platform/sound/vera_pcm.c
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src/engine/platform/sound/vera_pcm.c
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src/engine/platform/sound/atomicssg/ssg.c
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src/engine/platform/sound/nes_nsfplay/5e01_apu.cpp
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src/engine/platform/sound/nes_nsfplay/5e01_apu.cpp
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src/engine/platform/sound/nes_nsfplay/5e01_dmc.cpp
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src/engine/platform/sound/nes_nsfplay/5e01_dmc.cpp
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src/engine/platform/sound/nes_nsfplay/nes_apu.cpp
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src/engine/platform/sound/nes_nsfplay/nes_apu.cpp
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339
src/engine/platform/sound/atomicssg/LICENSE
Normal file
339
src/engine/platform/sound/atomicssg/LICENSE
Normal file
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@ -0,0 +1,339 @@
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GNU GENERAL PUBLIC LICENSE
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||||||
|
Version 2, June 1991
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|
Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
|
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|
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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|
Everyone is permitted to copy and distribute verbatim copies
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of this license document, but changing it is not allowed.
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|
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|
Preamble
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|
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|
The licenses for most software are designed to take away your
|
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|
freedom to share and change it. By contrast, the GNU General Public
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|
License is intended to guarantee your freedom to share and change free
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|
software--to make sure the software is free for all its users. This
|
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|
General Public License applies to most of the Free Software
|
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|
Foundation's software and to any other program whose authors commit to
|
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|
using it. (Some other Free Software Foundation software is covered by
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|
the GNU Lesser General Public License instead.) You can apply it to
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|
your programs, too.
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|
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|
When we speak of free software, we are referring to freedom, not
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price. Our General Public Licenses are designed to make sure that you
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have the freedom to distribute copies of free software (and charge for
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this service if you wish), that you receive source code or can get it
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in new free programs; and that you know you can do these things.
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To protect your rights, we need to make restrictions that forbid
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These restrictions translate to certain responsibilities for you if you
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For example, if you distribute copies of such a program, whether
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We protect your rights with two steps: (1) copyright the software, and
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The precise terms and conditions for copying, distribution and
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GNU GENERAL PUBLIC LICENSE
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TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
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0. This License applies to any program or other work which contains
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In addition, mere aggregation of another work not based on the Program
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It is not the purpose of this section to induce you to infringe any
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This section is intended to make thoroughly clear what is believed to
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Each version is given a distinguishing version number. If the Program
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NO WARRANTY
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|
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11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
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FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
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OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
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PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
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REPAIR OR CORRECTION.
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|
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12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
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REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
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TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
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YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
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POSSIBILITY OF SUCH DAMAGES.
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|
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END OF TERMS AND CONDITIONS
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|
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How to Apply These Terms to Your New Programs
|
||||||
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|
||||||
|
If you develop a new program, and you want it to be of the greatest
|
||||||
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possible use to the public, the best way to achieve this is to make it
|
||||||
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free software which everyone can redistribute and change under these terms.
|
||||||
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|
||||||
|
To do so, attach the following notices to the program. It is safest
|
||||||
|
to attach them to the start of each source file to most effectively
|
||||||
|
convey the exclusion of warranty; and each file should have at least
|
||||||
|
the "copyright" line and a pointer to where the full notice is found.
|
||||||
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|
||||||
|
<one line to give the program's name and a brief idea of what it does.>
|
||||||
|
Copyright (C) <year> <name of author>
|
||||||
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|
||||||
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This program is free software; you can redistribute it and/or modify
|
||||||
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it under the terms of the GNU General Public License as published by
|
||||||
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the Free Software Foundation; either version 2 of the License, or
|
||||||
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(at your option) any later version.
|
||||||
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|
||||||
|
This program is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
GNU General Public License for more details.
|
||||||
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|
||||||
|
You should have received a copy of the GNU General Public License along
|
||||||
|
with this program; if not, write to the Free Software Foundation, Inc.,
|
||||||
|
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||||
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|
||||||
|
Also add information on how to contact you by electronic and paper mail.
|
||||||
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|
||||||
|
If the program is interactive, make it output a short notice like this
|
||||||
|
when it starts in an interactive mode:
|
||||||
|
|
||||||
|
Gnomovision version 69, Copyright (C) year name of author
|
||||||
|
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
|
||||||
|
This is free software, and you are welcome to redistribute it
|
||||||
|
under certain conditions; type `show c' for details.
|
||||||
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|
||||||
|
The hypothetical commands `show w' and `show c' should show the appropriate
|
||||||
|
parts of the General Public License. Of course, the commands you use may
|
||||||
|
be called something other than `show w' and `show c'; they could even be
|
||||||
|
mouse-clicks or menu items--whatever suits your program.
|
||||||
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|
||||||
|
You should also get your employer (if you work as a programmer) or your
|
||||||
|
school, if any, to sign a "copyright disclaimer" for the program, if
|
||||||
|
necessary. Here is a sample; alter the names:
|
||||||
|
|
||||||
|
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
|
||||||
|
`Gnomovision' (which makes passes at compilers) written by James Hacker.
|
||||||
|
|
||||||
|
<signature of Ty Coon>, 1 April 1989
|
||||||
|
Ty Coon, President of Vice
|
||||||
|
|
||||||
|
This General Public License does not permit incorporating your program into
|
||||||
|
proprietary programs. If your program is a subroutine library, you may
|
||||||
|
consider it more useful to permit linking proprietary applications with the
|
||||||
|
library. If this is what you want to do, use the GNU Lesser General
|
||||||
|
Public License instead of this License.
|
5
src/engine/platform/sound/atomicssg/README.md
Normal file
5
src/engine/platform/sound/atomicssg/README.md
Normal file
|
@ -0,0 +1,5 @@
|
||||||
|
# AtomicSSG
|
||||||
|
|
||||||
|
AY-3-8910/YM2149 emulator based on YM2608-LLE.
|
||||||
|
|
||||||
|
stripped down version of it containing the basics needed for AY emulation.
|
468
src/engine/platform/sound/atomicssg/ssg.c
Normal file
468
src/engine/platform/sound/atomicssg/ssg.c
Normal file
|
@ -0,0 +1,468 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2023-2024 nukeykt
|
||||||
|
* Copyright (C) 2024 tildearrow
|
||||||
|
*
|
||||||
|
* This file is part of AtomicSSG.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License
|
||||||
|
* as published by the Free Software Foundation; either version 2
|
||||||
|
* of the License, or (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* SSG (AY-3-8910/YM2149) emulator.
|
||||||
|
* based on YM2608-LLE by nukeykt.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
#include <string.h>
|
||||||
|
#include "ssg.h"
|
||||||
|
|
||||||
|
void SSG_Clock(ssg_t* chip, int clk)
|
||||||
|
{
|
||||||
|
int i;
|
||||||
|
|
||||||
|
chip->input.clk = clk;
|
||||||
|
|
||||||
|
chip->clk1 = !chip->input.clk;
|
||||||
|
chip->clk2 = chip->input.clk;
|
||||||
|
|
||||||
|
chip->ic = !chip->input.ic;
|
||||||
|
|
||||||
|
{
|
||||||
|
int read = !chip->ic && !chip->input.rd && !chip->input.cs;
|
||||||
|
chip->read0 = !chip->ic && !chip->input.rd && !chip->input.cs && !chip->input.a1 && !chip->input.a0;
|
||||||
|
int write = !chip->input.wr && !chip->input.cs;
|
||||||
|
int writeaddr = chip->ic || (!chip->input.wr && !chip->input.cs && !chip->input.a0);
|
||||||
|
int writedata = !chip->ic && !chip->input.wr && !chip->input.cs && chip->input.a0;
|
||||||
|
int read1 = !chip->ic && !chip->input.rd && !chip->input.cs && !chip->input.a1 && chip->input.a0;
|
||||||
|
chip->read2 = !chip->ic && !chip->input.rd && !chip->input.cs && chip->input.a1 && !chip->input.a0;
|
||||||
|
chip->read3 = !chip->ic && !chip->input.rd && !chip->input.cs && chip->input.a1 && chip->input.a0;
|
||||||
|
chip->write2 = !chip->ic && !chip->input.wr && !chip->input.cs && chip->input.a1 && !chip->input.a0;
|
||||||
|
chip->write3 = !chip->ic && !chip->input.wr && !chip->input.cs && chip->input.a1 && chip->input.a0;
|
||||||
|
chip->ssg_write0 = writeaddr && !chip->input.a1;
|
||||||
|
chip->ssg_write1 = (writedata && !chip->input.a1) || chip->ic;
|
||||||
|
chip->ssg_read1 = read1;
|
||||||
|
|
||||||
|
chip->o_data_d = !read;
|
||||||
|
|
||||||
|
if (writeaddr)
|
||||||
|
chip->write0_trig0 = 1;
|
||||||
|
else if (chip->write0_l[0])
|
||||||
|
chip->write0_trig0 = 0;
|
||||||
|
if (chip->clk1)
|
||||||
|
{
|
||||||
|
chip->write0_trig1 = chip->write0_trig0;
|
||||||
|
chip->write0_l[1] = chip->write0_l[0];
|
||||||
|
}
|
||||||
|
if (chip->clk2)
|
||||||
|
{
|
||||||
|
chip->write0_l[0] = chip->write0_trig1;
|
||||||
|
chip->write0_l[2] = chip->write0_l[1];
|
||||||
|
}
|
||||||
|
chip->write0_en = chip->write0_l[0] && !chip->write0_l[2];
|
||||||
|
|
||||||
|
if (writedata)
|
||||||
|
chip->write1_trig0 = 1;
|
||||||
|
else if (chip->write1_l[0])
|
||||||
|
chip->write1_trig0 = 0;
|
||||||
|
if (chip->clk1)
|
||||||
|
{
|
||||||
|
chip->write1_trig1 = chip->write1_trig0;
|
||||||
|
chip->write1_l[1] = chip->write1_l[0];
|
||||||
|
}
|
||||||
|
if (chip->clk2)
|
||||||
|
{
|
||||||
|
chip->write1_l[0] = chip->write1_trig1;
|
||||||
|
chip->write1_l[2] = chip->write1_l[1];
|
||||||
|
}
|
||||||
|
chip->write1_en = chip->write1_l[0] && !chip->write1_l[2];
|
||||||
|
|
||||||
|
if (writeaddr)
|
||||||
|
chip->write2_trig0 = 1;
|
||||||
|
else if (chip->write2_l[0])
|
||||||
|
chip->write2_trig0 = 0;
|
||||||
|
if (chip->clk1)
|
||||||
|
{
|
||||||
|
chip->write2_trig1 = chip->write2_trig0;
|
||||||
|
chip->write2_l[1] = chip->write2_l[0];
|
||||||
|
}
|
||||||
|
if (chip->clk2)
|
||||||
|
{
|
||||||
|
chip->write2_l[0] = chip->write2_trig1;
|
||||||
|
chip->write2_l[2] = chip->write2_l[1];
|
||||||
|
}
|
||||||
|
chip->write2_en = chip->write2_l[0] && !chip->write2_l[2];
|
||||||
|
|
||||||
|
if (writedata)
|
||||||
|
chip->write3_trig0 = 1;
|
||||||
|
else if (chip->write3_l[0])
|
||||||
|
chip->write3_trig0 = 0;
|
||||||
|
|
||||||
|
if (write)
|
||||||
|
chip->data_l = (chip->input.data & 255) | (chip->input.a1 << 8);
|
||||||
|
|
||||||
|
if (chip->ic)
|
||||||
|
chip->data_bus2 |= 0x2f;
|
||||||
|
else
|
||||||
|
if (!read && !chip->ic)
|
||||||
|
chip->data_bus2 = chip->data_l ^ 0x1ff;
|
||||||
|
|
||||||
|
if (chip->ic_latch_fm[1])
|
||||||
|
{
|
||||||
|
chip->data_bus1 &= ~255;
|
||||||
|
}
|
||||||
|
else if (!read && !chip->ic)
|
||||||
|
{
|
||||||
|
chip->data_bus1 = chip->data_l;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
{
|
||||||
|
chip->ssg_clk1 = chip->clk1;
|
||||||
|
chip->ssg_clk2 = chip->clk2;
|
||||||
|
|
||||||
|
if (chip->ic)
|
||||||
|
chip->ssg_ssg_addr = 0;
|
||||||
|
else if (chip->ssg_write0)
|
||||||
|
chip->ssg_ssg_addr = (chip->data_bus1 & 0xf0) == 0;
|
||||||
|
|
||||||
|
if (chip->ic)
|
||||||
|
chip->ssg_address = 0;
|
||||||
|
else if (chip->ssg_write0 && (chip->data_bus1 & 0xe0) == 0)
|
||||||
|
chip->ssg_address = chip->data_bus1 & 0x1f;
|
||||||
|
|
||||||
|
int ssg_access = chip->ssg_ssg_addr && (chip->ssg_write1 || chip->ssg_read1);
|
||||||
|
|
||||||
|
if (chip->ssg_egtrig_rst)
|
||||||
|
chip->ssg_egtrig = 0;
|
||||||
|
|
||||||
|
if (chip->ic)
|
||||||
|
{
|
||||||
|
chip->ssg_freq_a[0] = chip->data_bus1 & 255;
|
||||||
|
chip->ssg_freq_a[1] = chip->data_bus1 & 15;
|
||||||
|
chip->ssg_freq_b[0] = chip->data_bus1 & 255;
|
||||||
|
chip->ssg_freq_b[1] = chip->data_bus1 & 15;
|
||||||
|
chip->ssg_freq_c[0] = chip->data_bus1 & 255;
|
||||||
|
chip->ssg_freq_c[1] = chip->data_bus1 & 15;
|
||||||
|
chip->ssg_noise = chip->data_bus1 & 31;
|
||||||
|
chip->ssg_mode = chip->data_bus1 & 255;
|
||||||
|
chip->ssg_level_a = chip->data_bus1 & 31;
|
||||||
|
chip->ssg_level_b = chip->data_bus1 & 31;
|
||||||
|
chip->ssg_level_c = chip->data_bus1 & 31;
|
||||||
|
chip->ssg_env[0] = chip->data_bus1 & 255;
|
||||||
|
chip->ssg_env[1] = chip->data_bus1 & 255;
|
||||||
|
chip->ssg_envmode = chip->data_bus1 & 15;
|
||||||
|
chip->o_gpio_a = chip->data_bus1 & 255;
|
||||||
|
chip->o_gpio_b = chip->data_bus1 & 255;
|
||||||
|
|
||||||
|
chip->ssg_egtrig = 1;
|
||||||
|
}
|
||||||
|
else if (chip->ssg_ssg_addr && chip->ssg_write1)
|
||||||
|
{
|
||||||
|
switch (chip->ssg_address)
|
||||||
|
{
|
||||||
|
case 0x0:
|
||||||
|
chip->ssg_freq_a[0] = chip->data_bus1 & 255;
|
||||||
|
break;
|
||||||
|
case 0x1:
|
||||||
|
chip->ssg_freq_a[1] = chip->data_bus1 & 15;
|
||||||
|
break;
|
||||||
|
case 0x2:
|
||||||
|
chip->ssg_freq_b[0] = chip->data_bus1 & 255;
|
||||||
|
break;
|
||||||
|
case 0x3:
|
||||||
|
chip->ssg_freq_b[1] = chip->data_bus1 & 15;
|
||||||
|
break;
|
||||||
|
case 0x4:
|
||||||
|
chip->ssg_freq_c[0] = chip->data_bus1 & 255;
|
||||||
|
break;
|
||||||
|
case 0x5:
|
||||||
|
chip->ssg_freq_c[1] = chip->data_bus1 & 15;
|
||||||
|
break;
|
||||||
|
case 0x6:
|
||||||
|
chip->ssg_noise = chip->data_bus1 & 31;
|
||||||
|
break;
|
||||||
|
case 0x7:
|
||||||
|
chip->ssg_mode = chip->data_bus1 & 255;
|
||||||
|
break;
|
||||||
|
case 0x8:
|
||||||
|
chip->ssg_level_a = chip->data_bus1 & 31;
|
||||||
|
break;
|
||||||
|
case 0x9:
|
||||||
|
chip->ssg_level_b = chip->data_bus1 & 31;
|
||||||
|
break;
|
||||||
|
case 0xa:
|
||||||
|
chip->ssg_level_c = chip->data_bus1 & 31;
|
||||||
|
break;
|
||||||
|
case 0xb:
|
||||||
|
chip->ssg_env[0] = chip->data_bus1 & 255;
|
||||||
|
break;
|
||||||
|
case 0xc:
|
||||||
|
chip->ssg_env[1] = chip->data_bus1 & 255;
|
||||||
|
break;
|
||||||
|
case 0xd:
|
||||||
|
chip->ssg_envmode = chip->data_bus1 & 15;
|
||||||
|
chip->ssg_egtrig = 1;
|
||||||
|
break;
|
||||||
|
case 0xe:
|
||||||
|
chip->o_gpio_a = chip->data_bus1 & 255;
|
||||||
|
break;
|
||||||
|
case 0xf:
|
||||||
|
chip->o_gpio_b = chip->data_bus1 & 255;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if (chip->ssg_ssg_addr && chip->ssg_read1)
|
||||||
|
{
|
||||||
|
switch (chip->ssg_address)
|
||||||
|
{
|
||||||
|
case 0x0:
|
||||||
|
chip->data_bus1 &= ~255;
|
||||||
|
chip->data_bus1 |= chip->ssg_freq_a[0] & 255;
|
||||||
|
break;
|
||||||
|
case 0x1:
|
||||||
|
chip->data_bus1 &= ~15;
|
||||||
|
chip->data_bus1 |= chip->ssg_freq_a[1] & 15;
|
||||||
|
break;
|
||||||
|
case 0x2:
|
||||||
|
chip->data_bus1 &= ~255;
|
||||||
|
chip->data_bus1 |= chip->ssg_freq_b[0] & 255;
|
||||||
|
break;
|
||||||
|
case 0x3:
|
||||||
|
chip->data_bus1 &= ~15;
|
||||||
|
chip->data_bus1 |= chip->ssg_freq_b[1] & 15;
|
||||||
|
break;
|
||||||
|
case 0x4:
|
||||||
|
chip->data_bus1 &= ~255;
|
||||||
|
chip->data_bus1 |= chip->ssg_freq_c[0] & 255;
|
||||||
|
break;
|
||||||
|
case 0x5:
|
||||||
|
chip->data_bus1 &= ~15;
|
||||||
|
chip->data_bus1 |= chip->ssg_freq_c[1] & 15;
|
||||||
|
break;
|
||||||
|
case 0x6:
|
||||||
|
chip->data_bus1 &= ~31;
|
||||||
|
chip->data_bus1 |= chip->ssg_noise & 31;
|
||||||
|
break;
|
||||||
|
case 0x7:
|
||||||
|
chip->data_bus1 &= ~255;
|
||||||
|
chip->data_bus1 |= chip->ssg_mode & 255;
|
||||||
|
break;
|
||||||
|
case 0x8:
|
||||||
|
chip->data_bus1 &= ~31;
|
||||||
|
chip->data_bus1 |= chip->ssg_level_a & 31;
|
||||||
|
break;
|
||||||
|
case 0x9:
|
||||||
|
chip->data_bus1 &= ~31;
|
||||||
|
chip->data_bus1 |= chip->ssg_level_b & 31;
|
||||||
|
break;
|
||||||
|
case 0xa:
|
||||||
|
chip->data_bus1 &= ~31;
|
||||||
|
chip->data_bus1 |= chip->ssg_level_c & 31;
|
||||||
|
break;
|
||||||
|
case 0xb:
|
||||||
|
chip->data_bus1 &= ~255;
|
||||||
|
chip->data_bus1 |= chip->ssg_env[0] & 255;
|
||||||
|
break;
|
||||||
|
case 0xc:
|
||||||
|
chip->data_bus1 &= ~255;
|
||||||
|
chip->data_bus1 |= chip->ssg_env[1] & 255;
|
||||||
|
break;
|
||||||
|
case 0xd:
|
||||||
|
chip->data_bus1 &= ~15;
|
||||||
|
chip->data_bus1 |= chip->ssg_envmode & 15;
|
||||||
|
break;
|
||||||
|
case 0xe:
|
||||||
|
chip->data_bus1 &= ~15;
|
||||||
|
chip->data_bus1 |= chip->input.gpio_a & 15;
|
||||||
|
break;
|
||||||
|
case 0xf:
|
||||||
|
chip->data_bus1 &= ~255;
|
||||||
|
chip->data_bus1 |= chip->input.gpio_b & 255;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if (chip->ssg_clk1)
|
||||||
|
{
|
||||||
|
chip->ssg_envadd = (chip->ssg_eg_of[1] & 4) != 0 && (chip->ssg_sel[1] & 8) != 0;
|
||||||
|
chip->ssg_envcnt[1] = chip->ssg_hold[0] ? 31 : chip->ssg_envcnt[0];
|
||||||
|
chip->ssg_dir[1] = chip->ssg_dir[0];
|
||||||
|
chip->ssg_hold[1] = chip->ssg_hold[0];
|
||||||
|
chip->ssg_t2[1] = chip->ssg_t2[0];
|
||||||
|
|
||||||
|
chip->ssg_egtrig_s = chip->ssg_egtrig;
|
||||||
|
|
||||||
|
chip->ssg_eg_sel_l = (chip->ssg_sel[1] & 8) != 0;
|
||||||
|
|
||||||
|
chip->ssg_sel[0] = chip->ssg_sel[1] << 1;
|
||||||
|
chip->ssg_sel[0] |= (chip->ssg_sel[1] & 7) == 0 && !chip->ic;
|
||||||
|
|
||||||
|
chip->ssg_sel_freq = 0;
|
||||||
|
if (chip->ssg_sel[1] & 1)
|
||||||
|
chip->ssg_sel_freq |= (chip->ssg_freq_c[1] << 8) | chip->ssg_freq_c[0];
|
||||||
|
if (chip->ssg_sel[1] & 2)
|
||||||
|
chip->ssg_sel_freq |= (chip->ssg_freq_b[1] << 8) | chip->ssg_freq_b[0];
|
||||||
|
if (chip->ssg_sel[1] & 4)
|
||||||
|
chip->ssg_sel_freq |= (chip->ssg_freq_a[1] << 8) | chip->ssg_freq_a[0];
|
||||||
|
if (chip->ssg_sel[1] & 8)
|
||||||
|
chip->ssg_sel_freq |= (chip->ssg_env[1] << 8) | chip->ssg_env[0];
|
||||||
|
|
||||||
|
int cnt = chip->ssg_freq_cnt[7] + 1;
|
||||||
|
int of = (cnt & 0x1000) != 0;
|
||||||
|
chip->ssg_freq_cnt[0] = cnt & 0xfff;
|
||||||
|
chip->ssg_freq_cnt[4] = chip->ssg_freq_cnt[3];
|
||||||
|
chip->ssg_freq_cnt[6] = chip->ssg_freq_cnt[5];
|
||||||
|
|
||||||
|
chip->ssg_cnt_of[1] = chip->ssg_cnt_of[0];
|
||||||
|
|
||||||
|
if (chip->ssg_sel[1] & 8)
|
||||||
|
chip->ssg_sign_toggle = chip->ssg_cnt_of[0] & 7;
|
||||||
|
else
|
||||||
|
chip->ssg_sign_toggle = 0;
|
||||||
|
|
||||||
|
chip->ssg_freq_cnt2[1] = chip->ssg_freq_cnt2[0];
|
||||||
|
chip->ssg_freq_cnt2[3] = chip->ssg_freq_cnt2[2];
|
||||||
|
chip->ssg_freq_cnt2[5] = chip->ssg_freq_cnt2[4];
|
||||||
|
chip->ssg_freq_cnt2[7] = chip->ssg_freq_cnt2[6];
|
||||||
|
|
||||||
|
chip->ssg_sign[1] = chip->ssg_sign[0];
|
||||||
|
|
||||||
|
int cnt_of = !chip->ssg_cnt_reload && (chip->ssg_sel_freq_l - chip->ssg_cnt_of_l < chip->ssg_freq_cnt2[0]);
|
||||||
|
|
||||||
|
chip->ssg_cnt2_add = (chip->ssg_sel[1] & 8) != 0 && of;
|
||||||
|
|
||||||
|
chip->ssg_sel_eg_l[0] = (chip->ssg_sel[1] & 8) != 0;
|
||||||
|
|
||||||
|
chip->ssg_eg_of[0] = (chip->ssg_eg_of[1] << 1) | cnt_of;
|
||||||
|
|
||||||
|
int fr_rst = chip->ssg_ch_of || ((cnt_of || chip->ssg_cnt_reload) && chip->ssg_sel_eg_l[1]);
|
||||||
|
|
||||||
|
chip->ssg_freq_cnt[2] = fr_rst ? 0 : chip->ssg_freq_cnt[1];
|
||||||
|
|
||||||
|
chip->ssg_fr_rst_l = fr_rst;
|
||||||
|
|
||||||
|
chip->ssg_noise_add = (chip->ssg_sel[1] & 1) != 0;
|
||||||
|
|
||||||
|
chip->ssg_noise_cnt[1] = chip->ssg_noise_cnt[0];
|
||||||
|
|
||||||
|
int noise_of = chip->ssg_noise <= (chip->ssg_noise_cnt[0] >> 1);
|
||||||
|
|
||||||
|
chip->ssg_noise_of = noise_of && chip->ssg_noise_of_low;
|
||||||
|
|
||||||
|
chip->ssg_test = chip->input.test;
|
||||||
|
|
||||||
|
chip->ssg_noise_step = chip->ssg_noise_of || !chip->ssg_test;
|
||||||
|
}
|
||||||
|
if (chip->ssg_clk2)
|
||||||
|
{
|
||||||
|
int sum = chip->ssg_envcnt[1] + chip->ssg_envadd;
|
||||||
|
int of = (sum & 32) != 0;
|
||||||
|
chip->ssg_envcnt[0] = chip->ssg_egtrig_s ? 0 : sum & 31;
|
||||||
|
|
||||||
|
int dir = of && (chip->ssg_envmode & 2) != 0 && !chip->ssg_hold[1];
|
||||||
|
chip->ssg_dir[0] = chip->ssg_egtrig_s ? 0 : chip->ssg_dir[1] ^ dir;
|
||||||
|
|
||||||
|
chip->ssg_hold[0] = chip->ssg_egtrig_s ? 0 : chip->ssg_hold[1] || (of && (chip->ssg_envmode & 1) != 0);
|
||||||
|
|
||||||
|
chip->ssg_t2[0] = chip->ssg_egtrig_s ? 0 : chip->ssg_t2[1] || of;
|
||||||
|
|
||||||
|
chip->ssg_egtrig_rst = chip->ssg_egtrig_s && chip->ssg_eg_sel_l;
|
||||||
|
|
||||||
|
|
||||||
|
chip->ssg_sel[1] = chip->ssg_sel[0];
|
||||||
|
|
||||||
|
chip->ssg_freq_cnt[1] = chip->ssg_freq_cnt[0];
|
||||||
|
chip->ssg_freq_cnt[3] = chip->ssg_freq_cnt[2];
|
||||||
|
chip->ssg_freq_cnt[5] = chip->ssg_freq_cnt[4];
|
||||||
|
chip->ssg_freq_cnt[7] = chip->ssg_freq_cnt[6];
|
||||||
|
|
||||||
|
int cnt_of = (chip->ssg_sel_freq & 0xfff) <= chip->ssg_freq_cnt[0];
|
||||||
|
|
||||||
|
chip->ssg_cnt_of_l = cnt_of;
|
||||||
|
chip->ssg_sel_freq_l = (chip->ssg_sel_freq >> 12) & 0xf;
|
||||||
|
|
||||||
|
chip->ssg_cnt_of[0] = (chip->ssg_cnt_of[1] << 1) | cnt_of;
|
||||||
|
|
||||||
|
if (chip->ic)
|
||||||
|
chip->ssg_sign[0] = 0;
|
||||||
|
else
|
||||||
|
chip->ssg_sign[0] = chip->ssg_sign[1] ^ chip->ssg_sign_toggle;
|
||||||
|
|
||||||
|
int cnt = chip->ssg_freq_cnt2[7] + chip->ssg_cnt2_add;
|
||||||
|
chip->ssg_freq_cnt2[0] = cnt & 0xf;
|
||||||
|
chip->ssg_freq_cnt2[2] = chip->ssg_fr_rst_l ? 0 : chip->ssg_freq_cnt2[1];
|
||||||
|
chip->ssg_freq_cnt2[4] = chip->ssg_freq_cnt2[3];
|
||||||
|
chip->ssg_freq_cnt2[6] = chip->ssg_freq_cnt2[5];
|
||||||
|
|
||||||
|
chip->ssg_sel_eg_l[1] = chip->ssg_sel_eg_l[0];
|
||||||
|
|
||||||
|
chip->ssg_ch_of = (!chip->ssg_sel_eg_l[0] && cnt_of) || chip->ic;
|
||||||
|
|
||||||
|
chip->ssg_cnt_reload = chip->ssg_sel_eg_l[0] && chip->ssg_egtrig_s;
|
||||||
|
|
||||||
|
chip->ssg_eg_of[1] = chip->ssg_eg_of[0];
|
||||||
|
|
||||||
|
|
||||||
|
chip->ssg_noise_cnt[0] = chip->ssg_noise_step ? 0 : ((chip->ssg_noise_cnt[1] + chip->ssg_noise_add) & 63);
|
||||||
|
|
||||||
|
chip->ssg_noise_of_low = (chip->ssg_noise_cnt[1] & 1) != 0 && chip->ssg_noise_add;
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!chip->ssg_noise_step)
|
||||||
|
{
|
||||||
|
int bit = ((chip->ssg_noise_lfsr[1] >> 16) ^ (chip->ssg_noise_lfsr[1] >> 13)) & 1;
|
||||||
|
|
||||||
|
if ((chip->ssg_noise_lfsr[1] & 0x1ffff) == 0)
|
||||||
|
bit |= 1;
|
||||||
|
|
||||||
|
chip->ssg_noise_lfsr[0] = (chip->ssg_noise_lfsr[1] << 1) | bit;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
chip->ssg_noise_lfsr[1] = chip->ic ? 0 : chip->ssg_noise_lfsr[0];
|
||||||
|
}
|
||||||
|
|
||||||
|
if (chip->ssg_clk2)
|
||||||
|
chip->ssg_noise_bit = (chip->ssg_noise_lfsr[1] >> 16) & 1;
|
||||||
|
|
||||||
|
int envlevel = chip->ssg_hold[0] ? 31 : chip->ssg_envcnt[0];
|
||||||
|
envlevel = (chip->ssg_dir[0] ^ ((chip->ssg_envmode >> 2) & 1)) == 0 ? (envlevel ^ 31) : envlevel;
|
||||||
|
envlevel = (chip->ssg_t2[0] && (chip->ssg_envmode & 8) == 0) ? 0 : envlevel;
|
||||||
|
|
||||||
|
int vol_a = (chip->ssg_level_a & 0x10) != 0 ? envlevel : (((chip->ssg_level_a & 15) << 1) | 1);
|
||||||
|
int vol_b = (chip->ssg_level_b & 0x10) != 0 ? envlevel : (((chip->ssg_level_b & 15) << 1) | 1);
|
||||||
|
int vol_c = (chip->ssg_level_c & 0x10) != 0 ? envlevel : (((chip->ssg_level_c & 15) << 1) | 1);
|
||||||
|
|
||||||
|
int sign_a = ((chip->ssg_mode & 1) == 0 && (chip->ssg_sign[0] & 1) != 0) || ((chip->ssg_mode & 8) == 0 && chip->ssg_noise_bit);
|
||||||
|
int sign_b = ((chip->ssg_mode & 2) == 0 && (chip->ssg_sign[0] & 2) != 0) || ((chip->ssg_mode & 16) == 0 && chip->ssg_noise_bit);
|
||||||
|
int sign_c = ((chip->ssg_mode & 4) == 0 && (chip->ssg_sign[0] & 4) != 0) || ((chip->ssg_mode & 32) == 0 && chip->ssg_noise_bit);
|
||||||
|
|
||||||
|
static const float volume_lut[32] = {
|
||||||
|
0.0000, 0.0000, 0.0049, 0.0075, 0.0105, 0.0131, 0.0156, 0.0183,
|
||||||
|
0.0228, 0.0276, 0.0321, 0.0367, 0.0448, 0.0535, 0.0626, 0.0713,
|
||||||
|
0.0884, 0.1057, 0.1225, 0.1392, 0.1691, 0.2013, 0.2348, 0.2670,
|
||||||
|
0.3307, 0.3951, 0.4573, 0.5196, 0.6316, 0.7528, 0.8787, 1.0000
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
chip->o_analog[0] = volume_lut[sign_a ? 0 : vol_a];
|
||||||
|
chip->o_analog[1] = volume_lut[sign_b ? 0 : vol_b];
|
||||||
|
chip->o_analog[2] = volume_lut[sign_c ? 0 : vol_c];
|
||||||
|
}
|
||||||
|
|
||||||
|
{
|
||||||
|
chip->read_bus = 0; // FIXME
|
||||||
|
if (chip->ssg_read1
|
||||||
|
|| chip->read3
|
||||||
|
)
|
||||||
|
chip->read_bus = chip->data_bus1 & 255;
|
||||||
|
|
||||||
|
chip->o_data = chip->read_bus;
|
||||||
|
}
|
||||||
|
}
|
153
src/engine/platform/sound/atomicssg/ssg.h
Normal file
153
src/engine/platform/sound/atomicssg/ssg.h
Normal file
|
@ -0,0 +1,153 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2023-2024 nukeykt
|
||||||
|
* Copyright (C) 2024 tildearrow
|
||||||
|
*
|
||||||
|
* This file is part of AtomicSSG.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License
|
||||||
|
* as published by the Free Software Foundation; either version 2
|
||||||
|
* of the License, or (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* SSG (AY-3-8910/YM2149) emulator.
|
||||||
|
* based on YM2608-LLE by nukeykt.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
typedef struct {
|
||||||
|
int clk;
|
||||||
|
int ic; // neg
|
||||||
|
int cs; // neg
|
||||||
|
int wr; // neg
|
||||||
|
int rd; // neg
|
||||||
|
int a0;
|
||||||
|
int a1;
|
||||||
|
int data;
|
||||||
|
int test; // set to 1
|
||||||
|
int gpio_a;
|
||||||
|
int gpio_b;
|
||||||
|
}
|
||||||
|
ssg_input_t;
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
ssg_input_t input;
|
||||||
|
|
||||||
|
int ic;
|
||||||
|
|
||||||
|
int ic_latch1[2];
|
||||||
|
int ic_latch2[2];
|
||||||
|
int ic_latch3[2];
|
||||||
|
int ic_check1;
|
||||||
|
int ic_check3;
|
||||||
|
int prescaler_latch[2];
|
||||||
|
int ic_check2;
|
||||||
|
int prescaler_sel[2];
|
||||||
|
int pssel_l[15][2];
|
||||||
|
int ic_latch_fm[2];
|
||||||
|
|
||||||
|
int clk1;
|
||||||
|
int clk2;
|
||||||
|
|
||||||
|
int ssg_write0;
|
||||||
|
int ssg_write1;
|
||||||
|
int ssg_read1;
|
||||||
|
|
||||||
|
int write2;
|
||||||
|
int write3;
|
||||||
|
|
||||||
|
int read2;
|
||||||
|
int read3;
|
||||||
|
|
||||||
|
int read0;
|
||||||
|
|
||||||
|
int write0_trig0;
|
||||||
|
int write0_trig1;
|
||||||
|
int write0_l[3];
|
||||||
|
int write0_en;
|
||||||
|
|
||||||
|
int write1_trig0;
|
||||||
|
int write1_trig1;
|
||||||
|
int write1_l[3];
|
||||||
|
int write1_en;
|
||||||
|
|
||||||
|
int write2_trig0;
|
||||||
|
int write2_trig1;
|
||||||
|
int write2_l[3];
|
||||||
|
int write2_en;
|
||||||
|
|
||||||
|
int write3_trig0;
|
||||||
|
int write3_trig1;
|
||||||
|
int write3_l[3];
|
||||||
|
int write3_en;
|
||||||
|
|
||||||
|
int data_l;
|
||||||
|
|
||||||
|
int data_bus1;
|
||||||
|
int data_bus2; // inverted
|
||||||
|
|
||||||
|
int read_bus;
|
||||||
|
|
||||||
|
int ssg_clk1;
|
||||||
|
int ssg_clk2;
|
||||||
|
int ssg_ssg_addr;
|
||||||
|
int ssg_address;
|
||||||
|
int ssg_freq_a[2];
|
||||||
|
int ssg_freq_b[2];
|
||||||
|
int ssg_freq_c[2];
|
||||||
|
int ssg_noise;
|
||||||
|
int ssg_mode;
|
||||||
|
int ssg_level_a;
|
||||||
|
int ssg_level_b;
|
||||||
|
int ssg_level_c;
|
||||||
|
int ssg_env[2];
|
||||||
|
int ssg_envmode;
|
||||||
|
int ssg_envadd;
|
||||||
|
int ssg_envcnt[2];
|
||||||
|
int ssg_dir[2];
|
||||||
|
int ssg_hold[2];
|
||||||
|
int ssg_t2[2];
|
||||||
|
int ssg_egtrig;
|
||||||
|
int ssg_egtrig_s;
|
||||||
|
int ssg_egtrig_rst;
|
||||||
|
int ssg_eg_sel_l;
|
||||||
|
int ssg_sel[2];
|
||||||
|
int ssg_sel_freq;
|
||||||
|
int ssg_freq_cnt[8];
|
||||||
|
int ssg_cnt_of[2];
|
||||||
|
int ssg_sign[2];
|
||||||
|
int ssg_sign_toggle;
|
||||||
|
int ssg_cnt_of_l;
|
||||||
|
int ssg_freq_cnt2[8];
|
||||||
|
int ssg_sel_freq_l;
|
||||||
|
int ssg_cnt2_add;
|
||||||
|
int ssg_sel_eg_l[2];
|
||||||
|
int ssg_ch_of;
|
||||||
|
int ssg_cnt_reload;
|
||||||
|
int ssg_eg_of[2];
|
||||||
|
int ssg_fr_rst_l;
|
||||||
|
int ssg_noise_add;
|
||||||
|
int ssg_noise_cnt[2];
|
||||||
|
int ssg_noise_of_low;
|
||||||
|
int ssg_noise_of;
|
||||||
|
int ssg_test;
|
||||||
|
int ssg_noise_step;
|
||||||
|
int ssg_noise_lfsr[2];
|
||||||
|
int ssg_noise_bit;
|
||||||
|
|
||||||
|
int o_gpio_a;
|
||||||
|
int o_gpio_a_d;
|
||||||
|
int o_gpio_b;
|
||||||
|
int o_gpio_b_d;
|
||||||
|
|
||||||
|
float o_analog[3];
|
||||||
|
|
||||||
|
int o_data;
|
||||||
|
int o_data_d;
|
||||||
|
}
|
||||||
|
ssg_t;
|
||||||
|
|
||||||
|
void SSG_Clock(ssg_t* chip, int clk);
|
Loading…
Reference in a new issue