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prepare for writing register dumps

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tildearrow 2022-01-17 13:29:35 -05:00
parent 871a417e25
commit 8b89f1b516
14 changed files with 47 additions and 35 deletions
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2
src/engine/platform/ym2610shared.h
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@ -24,7 +24,7 @@ static int orderedOps[4]={
};
#define rWrite(a,v) if (!skipRegisterWrites) {pendingWrites[a]=v;}
#define immWrite(a,v) if (!skipRegisterWrites) {writes.emplace(a,v);}
#define immWrite(a,v) if (!skipRegisterWrites) {writes.emplace(a,v); if (dumpWrites) {addWrite(a,v);} }
#define FM_FREQ_BASE 622.0f
#define PSG_FREQ_BASE 7640.0f