From 75b0ed7af1a299317936c2bc54fbca895e99a9de Mon Sep 17 00:00:00 2001
From: cam900 <dbtlrchl@naver.com>
Date: Mon, 19 Dec 2022 18:07:43 +0900
Subject: [PATCH] Add some PC-88 presets, with external soundcard(s) Added AY
 clock (1.9968MHz) for PC-88 reference:
 http://mydocuments.g2.xrea.com/html/p8/soundinfo.html,
 https://www.dtmstation.com/archives/52016817.html

---
 src/engine/fileOps.cpp     |   3 +
 src/engine/platform/ay.cpp |   3 +
 src/gui/presets.cpp        | 193 +++++++++++++++++++++++++++++++++++++
 3 files changed, 199 insertions(+)

diff --git a/src/engine/fileOps.cpp b/src/engine/fileOps.cpp
index b21d3a0d1..a140c4242 100644
--- a/src/engine/fileOps.cpp
+++ b/src/engine/fileOps.cpp
@@ -1167,6 +1167,9 @@ void DivEngine::convertOldFlags(unsigned int oldFlags, DivConfig& newFlags, DivS
         case 14:
           if (sys==DIV_SYSTEM_AY8910) newFlags.set("clockSel",14);
           break;
+        case 15:
+          if (sys==DIV_SYSTEM_AY8910) newFlags.set("clockSel",15);
+          break;
       }
       if (sys==DIV_SYSTEM_AY8910) switch ((oldFlags>>4)&3) {
         case 0:
diff --git a/src/engine/platform/ay.cpp b/src/engine/platform/ay.cpp
index fbd19f069..25a4cd1a5 100644
--- a/src/engine/platform/ay.cpp
+++ b/src/engine/platform/ay.cpp
@@ -830,6 +830,9 @@ void DivPlatformAY8910::setFlags(const DivConfig& flags) {
       case 14:
         chipClock=1536000;
         break;
+      case 15:
+        chipClock=38400*13*4; // 31948800/16
+        break;
       default:
         chipClock=COLOR_NTSC/2.0;
         break;
diff --git a/src/gui/presets.cpp b/src/gui/presets.cpp
index 29c64f424..54a2476c3 100644
--- a/src/gui/presets.cpp
+++ b/src/gui/presets.cpp
@@ -411,6 +411,199 @@ void FurnaceGUI::initSystemPresets() {
       ) // variable rate, Mono DAC
     }
   );
+  ENTRY(
+    "NEC PC-88 (with PC-8801-10)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_AY8910, 64, 0, "clockSel=15"), // external
+      CH(DIV_SYSTEM_AY8910, 64, 0, "clockSel=15") // ""
+    }
+  );
+  ENTRY(
+    "NEC PC-88 (with PC-8801-11)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_OPN, 64, 0, "clockSel=4") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-88 (with PC-8801-11; extended channel 3)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_OPN_EXT, 64, 0, "clockSel=4") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-88 (with PC-8801-23)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_PC98, 64, 0, "clockSel=1") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-88 (with PC-8801-23; extended channel 3)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_PC98_EXT, 64, 0, "clockSel=1") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-88 (with HMB-20 HIBIKI-8800)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_YM2151, 64, 0, "clockSel=2") // external; 4.0000MHz
+    }
+  );
+  ENTRY(
+    "NEC PC-8801mk2SR (with PC-8801-10)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_OPN, 64, 0, "clockSel=4"), // internal
+      CH(DIV_SYSTEM_AY8910, 64, 0, "clockSel=15"), // external
+      CH(DIV_SYSTEM_AY8910, 64, 0, "clockSel=15") // ""
+    }
+  );
+  ENTRY(
+    "NEC PC-8801mk2SR (with PC-8801-10; extended channel 3)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_OPN_EXT, 64, 0, "clockSel=4"), // internal
+      CH(DIV_SYSTEM_AY8910, 64, 0, "clockSel=15"), // external
+      CH(DIV_SYSTEM_AY8910, 64, 0, "clockSel=15") // ""
+    }
+  );
+  ENTRY(
+    "NEC PC-8801mk2SR (with PC-8801-11)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_OPN, 64, 0, "clockSel=4"), // internal
+      CH(DIV_SYSTEM_OPN, 64, 0, "clockSel=4") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-8801mk2SR (with PC-8801-11; extended channel 3 on internal OPN)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_OPN_EXT, 64, 0, "clockSel=4"), // internal
+      CH(DIV_SYSTEM_OPN, 64, 0, "clockSel=4") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-8801mk2SR (with PC-8801-11; extended channel 3 on external OPN)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_OPN, 64, 0, "clockSel=4"), // internal
+      CH(DIV_SYSTEM_OPN_EXT, 64, 0, "clockSel=4") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-8801mk2SR (with PC-8801-11; extended channel 3 on both OPNs)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_OPN_EXT, 64, 0, "clockSel=4"), // internal
+      CH(DIV_SYSTEM_OPN_EXT, 64, 0, "clockSel=4") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-8801mk2SR (with PC-8801-23)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_OPN, 64, 0, "clockSel=4"), // internal
+      CH(DIV_SYSTEM_PC98, 64, 0, "clockSel=1") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-8801mk2SR (with PC-8801-23; extended channel 3 on internal OPN)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_OPN_EXT, 64, 0, "clockSel=4"), // internal
+      CH(DIV_SYSTEM_PC98, 64, 0, "clockSel=1") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-8801mk2SR (with PC-8801-23; extended channel 3 on external OPN)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_OPN, 64, 0, "clockSel=4"), // internal
+      CH(DIV_SYSTEM_PC98_EXT, 64, 0, "clockSel=1") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-8801mk2SR (with PC-8801-23; extended channel 3 on both OPNs)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_OPN_EXT, 64, 0, "clockSel=4"), // internal
+      CH(DIV_SYSTEM_PC98_EXT, 64, 0, "clockSel=1") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-8801mk2SR (with HMB-20 HIBIKI-8800)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_OPN, 64, 0, "clockSel=4"), // internal
+      CH(DIV_SYSTEM_YM2151, 64, 0, "clockSel=2") // external; 4.0000MHz
+    }
+  );
+  ENTRY(
+    "NEC PC-8801mk2SR (with HMB-20 HIBIKI-8800; extended channel 3)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_OPN_EXT, 64, 0, "clockSel=4"), // internal
+      CH(DIV_SYSTEM_YM2151, 64, 0, "clockSel=2") // external; 4.0000MHz
+    }
+  );
+  ENTRY(
+    "NEC PC-8801FA (with PC-8801-11)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_PC98, 64, 0, "clockSel=1"), // internal
+      CH(DIV_SYSTEM_OPN, 64, 0, "clockSel=4") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-8801FA (with PC-8801-11; extended channel 3 on internal OPN)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_PC98_EXT, 64, 0, "clockSel=1"), // internal
+      CH(DIV_SYSTEM_OPN, 64, 0, "clockSel=4") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-8801FA (with PC-8801-11; extended channel 3 on external OPN)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_PC98, 64, 0, "clockSel=1"), // internal
+      CH(DIV_SYSTEM_OPN_EXT, 64, 0, "clockSel=4") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-8801FA (with PC-8801-11; extended channel 3 on both OPNs)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_PC98_EXT, 64, 0, "clockSel=1"), // internal
+      CH(DIV_SYSTEM_OPN_EXT, 64, 0, "clockSel=4") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-8801FA (with PC-8801-23)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_PC98, 64, 0, "clockSel=1"), // internal
+      CH(DIV_SYSTEM_PC98, 64, 0, "clockSel=1") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-8801FA (with PC-8801-23; extended channel 3 on internal OPN)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_PC98_EXT, 64, 0, "clockSel=1"), // internal
+      CH(DIV_SYSTEM_PC98, 64, 0, "clockSel=1") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-8801FA (with PC-8801-23; extended channel 3 on external OPN)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_PC98, 64, 0, "clockSel=1"), // internal
+      CH(DIV_SYSTEM_PC98_EXT, 64, 0, "clockSel=1") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-8801FA (with PC-8801-23; extended channel 3 on both OPNs)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_PC98_EXT, 64, 0, "clockSel=1"), // internal
+      CH(DIV_SYSTEM_PC98_EXT, 64, 0, "clockSel=1") // external
+    }
+  );
+  ENTRY(
+    "NEC PC-8801FA (with HMB-20 HIBIKI-8800)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_PC98, 64, 0, "clockSel=1"), // internal
+      CH(DIV_SYSTEM_YM2151, 64, 0, "clockSel=2") // external; 4.0000MHz
+    }
+  );
+  ENTRY(
+    "NEC PC-8801FA (with HMB-20 HIBIKI-8800; extended channel 3)", {
+      CH(DIV_SYSTEM_PCSPKR, 64, 0, "clockSel=1"),
+      CH(DIV_SYSTEM_PC98_EXT, 64, 0, "clockSel=1"), // internal
+      CH(DIV_SYSTEM_YM2151, 64, 0, "clockSel=2") // external; 4.0000MHz
+    }
+  );
   ENTRY(
     "NEC PC-98 (with PC-9801-26/K)", {
       CH(DIV_SYSTEM_OPN, 64, 0, "clockSel=4"), // 3.9936MHz but some compatible card has 4MHz