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OPN/A/B: fix SSG writes using YM2608-LLE core

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issue #2746
This commit is contained in:
tildearrow 2026-01-12 19:08:34 -05:00
parent 2c9251945f
commit 6be75e4141
4 changed files with 25 additions and 1 deletions
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20
src/engine/platform/ym2203.cpp
View file

@ -351,8 +351,10 @@ void DivPlatformYM2203::acquire_lle(short** buf, size_t len) {
}
ay->getRegisterWrites().clear();
//logI("output");
while (true) {
bool canWeWrite=fm_lle.prescaler_latch[1]&1;
bool canWeWrite=(fm_lle.prescaler_latch[1]&1);
if (canWeWrite) {
if (delay>0) {
@ -363,6 +365,8 @@ void DivPlatformYM2203::acquire_lle(short** buf, size_t len) {
fm_lle.input.a0=0;
fm_lle.input.a1=0;
delay=0;
//logV("idle - delay 3");
} else {
fm_lle.input.cs=0;
fm_lle.input.rd=0;
@ -371,6 +375,8 @@ void DivPlatformYM2203::acquire_lle(short** buf, size_t len) {
fm_lle.input.a1=0;
fm_lle.input.data=0;
delay=1;
//logV("waiting");
}
} else if (!writes.empty()) {
QueuedWrite& w=writes.front();
@ -383,6 +389,8 @@ void DivPlatformYM2203::acquire_lle(short** buf, size_t len) {
fm_lle.input.a0=0;
fm_lle.input.data=0;
//logV("idle - PRESCALER WRITE");
regPool[w.addr&0x1ff]=w.val;
writes.pop_front();
} else if (w.addrOrVal) {
@ -393,7 +401,10 @@ void DivPlatformYM2203::acquire_lle(short** buf, size_t len) {
fm_lle.input.a0=1;
fm_lle.input.data=w.val;
//logV("fucking the value %.2x",w.val);
delay=2;
if (w.addr<0x10) delay=3;
regPool[w.addr&0x1ff]=w.val;
writes.pop_front();
@ -405,7 +416,10 @@ void DivPlatformYM2203::acquire_lle(short** buf, size_t len) {
fm_lle.input.a0=0;
fm_lle.input.data=w.addr&0xff;
//logV("fucking the address %.2x",w.addr);
delay=2;
if (w.addr<0x10) delay=3;
w.addrOrVal=true;
}
@ -415,12 +429,15 @@ void DivPlatformYM2203::acquire_lle(short** buf, size_t len) {
fm_lle.input.wr=1;
fm_lle.input.a0=0;
fm_lle.input.a1=0;
//logV("idle");
}
}
FMOPNA_Clock(&fm_lle,0);
FMOPNA_Clock(&fm_lle,1);
//logV("CLOCK");
if (++subSubCycle>=6) {
subSubCycle=0;
if (subCycle>=0 && subCycle<6 && fm_lle.ac_fm_output_en) {
@ -434,6 +451,7 @@ void DivPlatformYM2203::acquire_lle(short** buf, size_t len) {
// check busy status here
if (!fm_lle.busy_cnt_en[1]) {
delay=0;
//logV("work done");
}
}
}

2
src/engine/platform/ym2608.cpp
View file

@ -589,6 +589,7 @@ void DivPlatformYM2608::acquire_lle(short** buf, size_t len) {
fm_lle.input.data=w.val;
delay=2;
if (w.addr<0x10) delay=3;
regPool[w.addr&0x1ff]=w.val;
writes.pop_front();
@ -601,6 +602,7 @@ void DivPlatformYM2608::acquire_lle(short** buf, size_t len) {
fm_lle.input.data=w.addr&0xff;
delay=2;
if (w.addr<0x10) delay=3;
w.addrOrVal=true;
}

2
src/engine/platform/ym2610.cpp
View file

@ -511,6 +511,7 @@ void DivPlatformYM2610::acquire_lle(short** buf, size_t len) {
fm_lle.input.data=w.val;
delay=2;
if (w.addr<0x10) delay=3;
regPool[w.addr&0x1ff]=w.val;
writes.pop_front();
@ -523,6 +524,7 @@ void DivPlatformYM2610::acquire_lle(short** buf, size_t len) {
fm_lle.input.data=w.addr&0xff;
delay=2;
if (w.addr<0x10) delay=3;
w.addrOrVal=true;
}

2
src/engine/platform/ym2610b.cpp
View file

@ -579,6 +579,7 @@ void DivPlatformYM2610B::acquire_lle(short** buf, size_t len) {
fm_lle.input.data=w.val;
delay=2;
if (w.addr<0x10) delay=3;
regPool[w.addr&0x1ff]=w.val;
writes.pop_front();
@ -591,6 +592,7 @@ void DivPlatformYM2610B::acquire_lle(short** buf, size_t len) {
fm_lle.input.data=w.addr&0xff;
delay=2;
if (w.addr<0x10) delay=3;
w.addrOrVal=true;
}