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OPL UNFINISHED
This commit is contained in:
tildearrow 2024-10-19 18:28:27 -05:00
parent dd9d8dccd1
commit 69b03172b1
13 changed files with 116 additions and 96 deletions
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18
src/engine/platform/arcade.cpp
View file

@ -55,10 +55,14 @@ void DivPlatformArcade::acquire_nuked(short** buf, size_t len) {
thread_local int o[2];
for (size_t h=0; h<len; h++) {
if (delay>0) delay--;
for (int i=0; i<8; i++) {
if (!writes.empty() && !fm.write_busy) {
if (delay<=0 && !writes.empty() && !fm.write_busy) {
QueuedWrite& w=writes.front();
if (w.addrOrVal) {
if (w.addr==0xfffffffe) {
delay=w.val;
writes.pop_front();
} else if (w.addrOrVal) {
OPM_Write(&fm,1,w.val);
regPool[w.addr&0xff]=w.val;
//printf("write: %x = %.2x\n",w.addr,w.val);
@ -101,12 +105,16 @@ void DivPlatformArcade::acquire_ymfm(short** buf, size_t len) {
if (!writes.empty()) {
if (--delay<1) {
QueuedWrite& w=writes.front();
if (w.addr==0xfffffffe) {
delay=w.val;
} else {
fm_ymfm->write(0x0+((w.addr>>8)<<1),w.addr);
fm_ymfm->write(0x1+((w.addr>>8)<<1),w.val);
regPool[w.addr&0xff]=w.val;
writes.pop_front();
delay=1;
}
writes.pop_front();
}
}
fm_ymfm->generate(&out_ymfm);
@ -380,9 +388,7 @@ void DivPlatformArcade::tick(bool sysTick) {
// hard reset handling
if (mustHardReset) {
for (unsigned int i=hardResetElapsed; i<hardResetCycles; i++) {
immWrite(0x1f,i&0xff);
}
immWrite(0xfffffffe,hardResetCycles-hardResetElapsed);
for (int i=0; i<8; i++) {
if ((chan[i].keyOn || chan[i].opMaskChanged) && chan[i].hardReset) {
// restore SL/RR

4
src/engine/platform/genesisext.cpp
View file

@ -693,9 +693,7 @@ void DivPlatformGenesisExt::tick(bool sysTick) {
// hard reset handling
if (mustHardReset) {
for (unsigned int i=hardResetElapsed; i<hardResetCycles; i++) {
immWrite(0xf0,i&0xff);
}
immWrite(0xfffffffe,hardResetCycles-hardResetElapsed);
for (int i=0; i<4; i++) {
if (opChan[i].keyOn && opChan[i].hardReset) {
// restore SL/RR

20
src/engine/platform/opl.cpp
View file

@ -190,8 +190,11 @@ void DivPlatformOPL::acquire_nuked(short** buf, size_t len) {
for (size_t h=0; h<len; h++) {
os[0]=0; os[1]=0; os[2]=0; os[3]=0; os[4]=0; os[5]=0;
if (!writes.empty() && --delay<0) {
delay=1;
QueuedWrite& w=writes.front();
if (w.addr==0xfffffffe) {
delay=w.val;
} else {
delay=1;
if (w.addr>=0x200) {
pcm.writeReg(w.addr&0xff,w.val);
regPool[0x200|(w.addr&0xff)]=w.val;
@ -218,6 +221,7 @@ void DivPlatformOPL::acquire_nuked(short** buf, size_t len) {
}
regPool[w.addr&511]=w.val;
}
}
writes.pop();
}
@ -353,11 +357,11 @@ void DivPlatformOPL::acquire_ymfm1(short** buf, size_t len) {
for (size_t h=0; h<len; h++) {
if (!writes.empty() && --delay<0) {
delay=1;
QueuedWrite& w=writes.front();
fm_ymfm1->write(0,w.addr);
fm_ymfm1->write(1,w.val);
delay=1;
regPool[w.addr&511]=w.val;
writes.pop();
@ -395,11 +399,11 @@ void DivPlatformOPL::acquire_ymfm2(short** buf, size_t len) {
for (size_t h=0; h<len; h++) {
if (!writes.empty() && --delay<0) {
delay=1;
QueuedWrite& w=writes.front();
fm_ymfm2->write(0,w.addr);
fm_ymfm2->write(1,w.val);
delay=1;
regPool[w.addr&511]=w.val;
writes.pop();
@ -438,11 +442,11 @@ void DivPlatformOPL::acquire_ymfm8950(short** buf, size_t len) {
for (size_t h=0; h<len; h++) {
if (!writes.empty() && --delay<0) {
delay=1;
QueuedWrite& w=writes.front();
fm_ymfm8950->write(0,w.addr);
fm_ymfm8950->write(1,w.val);
delay=1;
regPool[w.addr&511]=w.val;
writes.pop();
@ -482,11 +486,11 @@ void DivPlatformOPL::acquire_ymfm3(short** buf, size_t len) {
for (size_t h=0; h<len; h++) {
if (!writes.empty() && --delay<0) {
delay=1;
QueuedWrite& w=writes.front();
fm_ymfm3->write((w.addr&0x100)?2:0,w.addr);
fm_ymfm3->write(1,w.val);
delay=1;
regPool[w.addr&511]=w.val;
writes.pop();
@ -582,11 +586,11 @@ void DivPlatformOPL::acquire_ymfm4(short** buf, size_t len) {
for (size_t h=0; h<len; h++) {
if (!writes.empty() && --delay<0) {
delay=1;
QueuedWrite& w=writes.front();
fm_ymfm4->write((w.addr&0x200)?4:(w.addr&0x100)?2:0,w.addr);
fm_ymfm4->write((w.addr&0x200)?5:1,w.val);
delay=1;
regPool[(w.addr&0x200)?(0x200+(w.addr&255)):(w.addr&511)]=w.val;
writes.pop();
@ -1480,9 +1484,7 @@ void DivPlatformOPL::tick(bool sysTick) {
// hard reset handling
if (mustHardReset) {
for (unsigned int i=hardResetElapsed; i<128; i++) {
immWrite(0x3f,i&0xff);
}
immWrite(0xfffffffe,128-hardResetElapsed);
for (int i=0x80; i<0xa0; i++) {
if (weWillWriteRRLater[i-0x80]) {
immWrite(i,pendingWrites[i]&0xff);

4
src/engine/platform/opl.h
View file

@ -98,11 +98,11 @@ class DivPlatformOPL: public DivDispatch {
DivDispatchOscBuffer* oscBuf[44];
bool isMuted[44];
struct QueuedWrite {
unsigned short addr;
unsigned int addr;
unsigned char val;
bool addrOrVal;
QueuedWrite(): addr(0), val(0), addrOrVal(false) {}
QueuedWrite(unsigned short a, unsigned char v): addr(a), val(v), addrOrVal(false) {}
QueuedWrite(unsigned int a, unsigned char v): addr(a), val(v), addrOrVal(false) {}
};
FixedQueue<QueuedWrite,4096> writes;

10
src/engine/platform/tx81z.cpp
View file

@ -67,12 +67,16 @@ void DivPlatformTX81Z::acquire(short** buf, size_t len) {
if (!writes.empty()) {
if (--delay<1) {
QueuedWrite& w=writes.front();
if (w.addr==0xfffffffe) {
delay=w.val;
} else {
fm_ymfm->write(0x0+((w.addr>>8)<<1),w.addr);
fm_ymfm->write(0x1+((w.addr>>8)<<1),w.val);
regPool[w.addr&0xff]=w.val;
writes.pop_front();
delay=1;
}
writes.pop_front();
}
}
fm_ymfm->generate(&out_ymfm);
@ -419,9 +423,7 @@ void DivPlatformTX81Z::tick(bool sysTick) {
// hard reset handling
if (mustHardReset) {
for (unsigned int i=hardResetElapsed; i<hardResetCycles; i++) {
immWrite(0x1f,i&0xff);
}
immWrite(0xfffffffe,hardResetCycles-hardResetElapsed);
for (int i=0; i<8; i++) {
if (chan[i].keyOn && chan[i].hardReset) {
// restore SL/RR

15
src/engine/platform/ym2203.cpp
View file

@ -187,7 +187,10 @@ void DivPlatformYM2203::acquire_combo(short** buf, size_t len) {
if (--delay<1 && !(fm->read(0)&0x80)) {
QueuedWrite& w=writes.front();
if (w.addr<=0x1c || w.addr==0x2d || w.addr==0x2e || w.addr==0x2f) {
if (w.addr==0xfffffffe) {
delay=w.val;
writes.pop_front();
} else if (w.addr<=0x1c || w.addr==0x2d || w.addr==0x2e || w.addr==0x2f) {
// ymfm write
fm->write(0x0,w.addr);
fm->write(0x1,w.val);
@ -267,12 +270,16 @@ void DivPlatformYM2203::acquire_ymfm(short** buf, size_t len) {
if (!writes.empty()) {
if (--delay<1) {
QueuedWrite& w=writes.front();
if (w.addr==0xfffffffe) {
delay=w.val*6;
} else {
fm->write(0x0,w.addr);
fm->write(0x1,w.val);
regPool[w.addr&0xff]=w.val;
writes.pop_front();
delay=6;
}
writes.pop_front();
}
}
fm->generate(&fmout);
@ -661,9 +668,7 @@ void DivPlatformYM2203::tick(bool sysTick) {
// hard reset handling
if (mustHardReset) {
for (unsigned int i=hardResetElapsed; i<hardResetCycles; i++) {
immWrite(0xf0,i&0xff);
}
immWrite(0xfffffffe,hardResetCycles-hardResetElapsed);
for (int i=0; i<3; i++) {
if (i==2 && extMode) continue;
if ((chan[i].keyOn || chan[i].opMaskChanged) && chan[i].hardReset) {

4
src/engine/platform/ym2203ext.cpp
View file

@ -595,9 +595,7 @@ void DivPlatformYM2203Ext::tick(bool sysTick) {
// hard reset handling
if (mustHardReset) {
for (unsigned int i=hardResetElapsed; i<hardResetCycles; i++) {
immWrite(0xf0,i&0xff);
}
immWrite(0xfffffffe,hardResetCycles-hardResetElapsed);
for (int i=0; i<4; i++) {
if (opChan[i].keyOn && opChan[i].hardReset) {
// restore SL/RR

15
src/engine/platform/ym2608.cpp
View file

@ -338,7 +338,10 @@ void DivPlatformYM2608::acquire_combo(short** buf, size_t len) {
if (--delay<1 && !(fm->read(0)&0x80)) {
QueuedWrite& w=writes.front();
if (w.addr<=0x1d || w.addr==0x2d || w.addr==0x2e || w.addr==0x2f || (w.addr>=0x100 && w.addr<=0x12d)) {
if (w.addr==0xfffffffe) {
delay=w.val;
writes.pop_front();
} else if (w.addr<=0x1d || w.addr==0x2d || w.addr==0x2e || w.addr==0x2f || (w.addr>=0x100 && w.addr<=0x12d)) {
// ymfm write
fm->write(0x0+((w.addr>>8)<<1),w.addr);
fm->write(0x1+((w.addr>>8)<<1),w.val);
@ -451,12 +454,16 @@ void DivPlatformYM2608::acquire_ymfm(short** buf, size_t len) {
if (!writes.empty()) {
if (--delay<1) {
QueuedWrite& w=writes.front();
if (w.addr==0xfffffffe) {
delay=w.val*4;
} else {
fm->write(0x0+((w.addr>>8)<<1),w.addr);
fm->write(0x1+((w.addr>>8)<<1),w.val);
regPool[w.addr&0x1ff]=w.val;
writes.pop_front();
delay=4;
}
writes.pop_front();
}
}
fm->generate(&fmout);
@ -1028,9 +1035,7 @@ void DivPlatformYM2608::tick(bool sysTick) {
// hard reset handling
if (mustHardReset) {
for (unsigned int i=hardResetElapsed; i<hardResetCycles; i++) {
immWrite(0xf0,i&0xff);
}
immWrite(0xfffffffe,hardResetCycles-hardResetElapsed);
for (int i=0; i<6; i++) {
if (i==2 && extMode) continue;
if ((chan[i].keyOn || chan[i].opMaskChanged) && chan[i].hardReset) {

4
src/engine/platform/ym2608ext.cpp
View file

@ -646,9 +646,7 @@ void DivPlatformYM2608Ext::tick(bool sysTick) {
// hard reset handling
if (mustHardReset) {
for (unsigned int i=hardResetElapsed; i<hardResetCycles; i++) {
immWrite(0xf0,i&0xff);
}
immWrite(0xfffffffe,hardResetCycles-hardResetElapsed);
for (int i=0; i<4; i++) {
if (opChan[i].keyOn && opChan[i].hardReset) {
// restore SL/RR

15
src/engine/platform/ym2610.cpp
View file

@ -274,7 +274,10 @@ void DivPlatformYM2610::acquire_combo(short** buf, size_t len) {
if (--delay<1 && !(fm->read(0)&0x80)) {
QueuedWrite& w=writes.front();
if (w.addr<=0x1c || (w.addr>=0x100 && w.addr<=0x12d)) {
if (w.addr==0xfffffffe) {
delay=w.val;
writes.pop_front();
} else if (w.addr<=0x1c || (w.addr>=0x100 && w.addr<=0x12d)) {
// ymfm write
fm->write(0x0+((w.addr>>8)<<1),w.addr);
fm->write(0x1+((w.addr>>8)<<1),w.val);
@ -385,12 +388,16 @@ void DivPlatformYM2610::acquire_ymfm(short** buf, size_t len) {
if (!writes.empty()) {
if (--delay<1 && !(fm->read(0)&0x80)) {
QueuedWrite& w=writes.front();
if (w.addr==0xfffffffe) {
delay=w.val;
} else {
fm->write(0x0+((w.addr>>8)<<1),w.addr);
fm->write(0x1+((w.addr>>8)<<1),w.val);
regPool[w.addr&0x1ff]=w.val;
writes.pop_front();
delay=1;
}
writes.pop_front();
}
}
fm->generate(&fmout);
@ -956,9 +963,7 @@ void DivPlatformYM2610::tick(bool sysTick) {
// hard reset handling
if (mustHardReset) {
for (unsigned int i=hardResetElapsed; i<hardResetCycles; i++) {
immWrite(0xf0,i&0xff);
}
immWrite(0xfffffffe,hardResetCycles-hardResetElapsed);
for (int i=0; i<(psgChanOffs-isCSM); i++) {
if (i==1 && extMode) continue;
if ((chan[i].keyOn || chan[i].opMaskChanged) && chan[i].hardReset) {

15
src/engine/platform/ym2610b.cpp
View file

@ -338,7 +338,10 @@ void DivPlatformYM2610B::acquire_combo(short** buf, size_t len) {
if (--delay<1 && !(fm->read(0)&0x80)) {
QueuedWrite& w=writes.front();
if (w.addr<=0x1c || (w.addr>=0x100 && w.addr<=0x12d)) {
if (w.addr==0xfffffffe) {
delay=w.val;
writes.pop_front();
} else if (w.addr<=0x1c || (w.addr>=0x100 && w.addr<=0x12d)) {
// ymfm write
fm->write(0x0+((w.addr>>8)<<1),w.addr);
fm->write(0x1+((w.addr>>8)<<1),w.val);
@ -451,12 +454,16 @@ void DivPlatformYM2610B::acquire_ymfm(short** buf, size_t len) {
if (!writes.empty()) {
if (--delay<1 && !(fm->read(0)&0x80)) {
QueuedWrite& w=writes.front();
if (w.addr==0xfffffffe) {
delay=w.val;
} else {
fm->write(0x0+((w.addr>>8)<<1),w.addr);
fm->write(0x1+((w.addr>>8)<<1),w.val);
regPool[w.addr&0x1ff]=w.val;
writes.pop_front();
delay=1;
}
writes.pop_front();
}
}
fm->generate(&fmout);
@ -1024,9 +1031,7 @@ void DivPlatformYM2610B::tick(bool sysTick) {
// hard reset handling
if (mustHardReset) {
for (unsigned int i=hardResetElapsed; i<hardResetCycles; i++) {
immWrite(0xf0,i&0xff);
}
immWrite(0xfffffffe,hardResetCycles-hardResetElapsed);
for (int i=0; i<(psgChanOffs-isCSM); i++) {
if (i==2 && extMode) continue;
if ((chan[i].keyOn || chan[i].opMaskChanged) && chan[i].hardReset) {

4
src/engine/platform/ym2610bext.cpp
View file

@ -638,9 +638,7 @@ void DivPlatformYM2610BExt::tick(bool sysTick) {
// hard reset handling
if (mustHardReset) {
for (unsigned int i=hardResetElapsed; i<hardResetCycles; i++) {
immWrite(0xf0,i&0xff);
}
immWrite(0xfffffffe,hardResetCycles-hardResetElapsed);
for (int i=0; i<4; i++) {
if (opChan[i].keyOn && opChan[i].hardReset) {
// restore SL/RR

4
src/engine/platform/ym2610ext.cpp
View file

@ -638,9 +638,7 @@ void DivPlatformYM2610Ext::tick(bool sysTick) {
// hard reset handling
if (mustHardReset) {
for (unsigned int i=hardResetElapsed; i<hardResetCycles; i++) {
immWrite(0xf0,i&0xff);
}
immWrite(0xfffffffe,hardResetCycles-hardResetElapsed);
for (int i=0; i<4; i++) {
if (opChan[i].keyOn && opChan[i].hardReset) {
// restore SL/RR