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add phase invesrion for left/right channel and feedback

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This commit is contained in:
LTVA1 2024-08-11 16:47:49 +03:00
parent f5877abafe
commit 65d65ef81e
7 changed files with 107 additions and 9 deletions
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2
src/engine/instrument.cpp
View file

@ -269,6 +269,8 @@ bool DivInstrumentSID3::operator==(const DivInstrumentSID3& other) {
_C(separateNoisePitch) &&
_C(special_wave) &&
_C(doWavetable) &&
_C(phaseInv) &&
_C(feedback) &&
_C(filt[0]) &&
_C(filt[1]) &&
_C(filt[2]) &&

6
src/engine/instrument.h
View file

@ -874,6 +874,8 @@ struct DivInstrumentSID3
bool separateNoisePitch;
unsigned char special_wave;
bool doWavetable;
unsigned char phaseInv;
unsigned char feedback;
struct Filter
{
@ -940,7 +942,9 @@ struct DivInstrumentSID3
oneBitNoise(false),
separateNoisePitch(false),
special_wave(0),
doWavetable(false)
doWavetable(false),
phaseInv(0),
feedback(0)
{
filt[0].mode = 16 | 32; //default settings so filter just works, connect to input and channel output
filt[0].output_volume = 0xff;

15
src/engine/platform/sid3.cpp
View file

@ -308,6 +308,10 @@ void DivPlatformSID3::tick(bool sysTick)
panChanged = true;
chan[i].panRight = chan[i].std.panR.val & 0xff;
}
if (chan[i].std.op[2].ar.had) { //channel signal inversion
chan[i].phaseInv = chan[i].std.op[2].ar.val & 3;
rWrite(SID3_REGISTER_PHASE_INVERSION + i * SID3_REGISTERS_PER_CHANNEL, chan[i].phaseInv);
}
if (chan[i].std.op[0].am.had) { //key on/off
chan[i].gate = chan[i].std.op[0].am.val & 1;
flagsChanged = true;
@ -330,6 +334,10 @@ void DivPlatformSID3::tick(bool sysTick)
chan[i].phaseSrc = chan[i].std.fb.val & 0xff;
rWrite(SID3_REGISTER_PHASE_MOD_SRC + i * SID3_REGISTERS_PER_CHANNEL, chan[i].phaseSrc);
}
if (chan[i].std.op[3].ar.had) { //feedback
chan[i].feedback = chan[i].std.op[3].ar.val & 0xff;
rWrite(SID3_REGISTER_FEEDBACK + i * SID3_REGISTERS_PER_CHANNEL, chan[i].feedback);
}
if (chan[i].std.phaseReset.had) {
chan[i].phaseReset = chan[i].std.phaseReset.val & 1;
@ -517,6 +525,9 @@ void DivPlatformSID3::tick(bool sysTick)
rWrite(SID3_REGISTER_SYNC_SRC + i * SID3_REGISTERS_PER_CHANNEL, chan[i].syncSrc); //hard sync source
rWrite(SID3_REGISTER_PHASE_MOD_SRC + i * SID3_REGISTERS_PER_CHANNEL, chan[i].phaseSrc); //phase mod source
rWrite(SID3_REGISTER_PHASE_INVERSION + i * SID3_REGISTERS_PER_CHANNEL, chan[i].phaseInv); //signal inversion
rWrite(SID3_REGISTER_FEEDBACK + i * SID3_REGISTERS_PER_CHANNEL, chan[i].feedback); //feedback
updateEnvelope(i);
updateFlags(i, false); //gate off TODO: make it properly?
@ -677,9 +688,13 @@ int DivPlatformSID3::dispatch(DivCommand c) {
chan[c.chan].ringSrc = ins->sid3.ring_mod_source;
chan[c.chan].syncSrc = ins->sid3.sync_source;
chan[c.chan].phaseSrc = ins->sid3.phase_mod_source;
chan[c.chan].independentNoiseFreq = ins->sid3.separateNoisePitch;
chan[c.chan].phaseInv = ins->sid3.phaseInv;
chan[c.chan].feedback = ins->sid3.feedback;
for(int j = 0; j < SID3_NUM_FILTERS; j++)
{
if(ins->sid3.filt[j].init)

9
src/engine/platform/sid3.h
View file

@ -76,6 +76,9 @@ class DivPlatformSID3: public DivDispatch {
unsigned long long dacPos;
int dacSample;
unsigned char phaseInv;
unsigned char feedback;
void handleArpNoise(int offset=0)
{
DivMacroStruct& m = this->std.op[3].am;
@ -164,14 +167,16 @@ class DivPlatformSID3: public DivDispatch {
panRight(0xff),
noiseFreq(0),
independentNoiseFreq(false),
noiseLFSRMask((1 << 29) | (1 << 5) | (1 << 3) | 1),
noiseLFSRMask((1 << 29) | (1 << 5) | (1 << 3) | 1), //https://docs.amd.com/v/u/en-US/xapp052 for 30 bits: 30, 6, 4, 1
pcm(false),
wavetable(-1),
dacPeriod(0),
dacRate(0),
dacOut(0),
dacPos(0),
dacSample(-1) {} //https://docs.amd.com/v/u/en-US/xapp052 for 30 bits: 30, 6, 4, 1
dacSample(-1),
phaseInv(0),
feedback(0) {}
};
Channel chan[SID3_NUM_CHANNELS];
DivDispatchOscBuffer* oscBuf[SID3_NUM_CHANNELS];

39
src/engine/platform/sound/sid3.c
View file

@ -3061,6 +3061,11 @@ void sid3_clock(SID3* sid3)
ch->noise_accumulator += ch->phase_mod_source == SID3_NUM_CHANNELS - 1 ? ((uint64_t)sid3->wave_channel_output << 18) : ((uint64_t)sid3->channel_output[ch->phase_mod_source] << 18);
}
if(ch->feedback)
{
ch->accumulator += (ch->prev_output + ch->prev_output2) * ch->feedback;
}
ch->accumulator &= SID3_ACC_MASK;
if((prev_noise_acc & ((uint32_t)1 << (SID3_ACC_BITS - 6))) != (ch->noise_accumulator & ((uint32_t)1 << (SID3_ACC_BITS - 6))))
@ -3097,11 +3102,17 @@ void sid3_clock(SID3* sid3)
{
output = ch->output_before_filter;
}
if(ch->feedback)
{
ch->prev_output2 = ch->prev_output;
ch->prev_output = output + 0xffff;
}
if(!sid3->muted[i])
{
sid3->output_l += output * ch->panning_left / 0x8f0;
sid3->output_r += output * ch->panning_right / 0x8f0;
sid3->output_l += output * ch->panning_left / 0x8f0 * ((ch->phase_inv & SID3_INV_SIGNAL_LEFT) ? -1 : 1);
sid3->output_r += output * ch->panning_right / 0x8f0 * ((ch->phase_inv & SID3_INV_SIGNAL_RIGHT) ? -1 : 1);
}
sid3->channel_output[i] = output;
@ -3189,8 +3200,8 @@ void sid3_clock(SID3* sid3)
if(!sid3->muted[SID3_NUM_CHANNELS - 1])
{
sid3->output_l += output * ch->panning_left / 0x8f0;
sid3->output_r += output * ch->panning_right / 0x8f0;
sid3->output_l += output * ch->panning_left / 0x8f0 * ((ch->phase_inv & SID3_INV_SIGNAL_LEFT) ? -1 : 1);
sid3->output_r += output * ch->panning_right / 0x8f0 * ((ch->phase_inv & SID3_INV_SIGNAL_RIGHT) ? -1 : 1);
}
sid3->wave_channel_output = output;
@ -3726,6 +3737,26 @@ void sid3_write(SID3* sid3, uint16_t address, uint8_t data)
}
break;
}
case SID3_REGISTER_PHASE_INVERSION:
{
if(channel != SID3_NUM_CHANNELS - 1)
{
sid3->chan[channel].phase_inv = data;
}
else
{
sid3->wave_chan.phase_inv = data;
}
break;
}
case SID3_REGISTER_FEEDBACK:
{
if(channel != SID3_NUM_CHANNELS - 1)
{
sid3->chan[channel].feedback = (uint32_t)data * (uint32_t)data;
}
break;
}
default: break;
}
}

19
src/engine/platform/sound/sid3.h
View file

@ -42,6 +42,12 @@ enum Flags
SID3_CHAN_1_BIT_NOISE = 128,
};
enum PhaseInversion
{
SID3_INV_SIGNAL_RIGHT = 1,
SID3_INV_SIGNAL_LEFT = 2,
};
enum Waveforms
{
SID3_WAVE_TRIANGLE = 1,
@ -127,6 +133,10 @@ enum Registers
SID3_REGISTER_STREAMED_SAMPLE_HIGH = SID3_REGISTER_AFTER_FILT_1ST_REG + 10,
SID3_REGISTER_STREAMED_SAMPLE_LOW = SID3_REGISTER_AFTER_FILT_1ST_REG + 11,
SID3_REGISTER_PHASE_INVERSION = SID3_REGISTER_AFTER_FILT_1ST_REG + 12,
SID3_REGISTER_FEEDBACK = SID3_REGISTER_AFTER_FILT_1ST_REG + 13,
};
typedef struct
@ -200,9 +210,13 @@ typedef struct
uint8_t clock_filter;
uint8_t panning_left, panning_right;
bool invert_left, invert_right; //invert channel signal
int32_t output_before_filter;
uint8_t phase_inv;
uint32_t feedback;
int32_t prev_output, prev_output2;
} sid3_channel;
typedef struct
@ -229,9 +243,10 @@ typedef struct
uint8_t clock_filter;
uint8_t panning_left, panning_right;
bool invert_left, invert_right; //invert channel signal
int32_t output_before_filter;
uint8_t phase_inv;
} sid3_wavetable_chan;
typedef struct