Channel enable bit is inverted

This commit is contained in:
cam900 2022-03-28 01:22:24 +09:00
parent c430d24d2f
commit 5c5c9199c7
3 changed files with 14 additions and 14 deletions

View file

@ -36,7 +36,7 @@
-xxx ---- Pulse 1 Duty cycle -xxx ---- Pulse 1 Duty cycle
---- xxxx Pulse 1 Volume ---- xxxx Pulse 1 Volume
9001 xxxx xxxx Pulse 1 Pitch bit 0-7 9001 xxxx xxxx Pulse 1 Pitch bit 0-7
9002 x--- ---- Pulse 1 Disable 9002 x--- ---- Pulse 1 Enable
---- xxxx Pulse 1 Pitch bit 8-11 ---- xxxx Pulse 1 Pitch bit 8-11
9003 Sound control 9003 Sound control
@ -51,14 +51,14 @@
-xxx ---- Pulse 2 Duty cycle -xxx ---- Pulse 2 Duty cycle
---- xxxx Pulse 2 Volume ---- xxxx Pulse 2 Volume
a001 xxxx xxxx Pulse 2 Pitch bit 0-7 a001 xxxx xxxx Pulse 2 Pitch bit 0-7
a002 x--- ---- Pulse 2 Disable a002 x--- ---- Pulse 2 Enable
---- xxxx Pulse 2 Pitch bit 8-11 ---- xxxx Pulse 2 Pitch bit 8-11
b000-b002 Sawtooth b000-b002 Sawtooth
b000 --xx xxxx Sawtooth Accumulate Rate b000 --xx xxxx Sawtooth Accumulate Rate
b001 xxxx xxxx Sawtooth Pitch bit 0-7 b001 xxxx xxxx Sawtooth Pitch bit 0-7
b002 x--- ---- Sawtooth Disable b002 x--- ---- Sawtooth Enable
---- xxxx Sawtooth Pitch bit 8-11 ---- xxxx Sawtooth Pitch bit 8-11
f000-f002 IRQ Timer f000-f002 IRQ Timer
@ -113,7 +113,7 @@ void vrcvi_core::reset()
bool vrcvi_core::alu_t::tick() bool vrcvi_core::alu_t::tick()
{ {
if (!m_divider.m_disable) if (m_divider.m_enable)
{ {
const u16 temp = m_counter; const u16 temp = m_counter;
// post decrement // post decrement
@ -144,7 +144,7 @@ bool vrcvi_core::alu_t::tick()
bool vrcvi_core::pulse_t::tick() bool vrcvi_core::pulse_t::tick()
{ {
if (m_divider.m_disable) if (!m_divider.m_enable)
return false; return false;
if (vrcvi_core::alu_t::tick()) if (vrcvi_core::alu_t::tick())
@ -155,7 +155,7 @@ bool vrcvi_core::pulse_t::tick()
bool vrcvi_core::sawtooth_t::tick() bool vrcvi_core::sawtooth_t::tick()
{ {
if (m_divider.m_disable) if (!m_divider.m_enable)
return false; return false;
if (vrcvi_core::alu_t::tick()) if (vrcvi_core::alu_t::tick())
@ -232,7 +232,7 @@ void vrcvi_core::alu_t::divider_t::write(bool msb, u8 data)
if (msb) if (msb)
{ {
m_divider = (m_divider & ~0xf00) | (bitfield<u32>(data, 0, 4) << 8); m_divider = (m_divider & ~0xf00) | (bitfield<u32>(data, 0, 4) << 8);
m_disable = bitfield(data, 7); m_enable = bitfield(data, 7);
} }
else else
m_divider = (m_divider & ~0x0ff) | data; m_divider = (m_divider & ~0x0ff) | data;

View file

@ -78,19 +78,19 @@ private:
{ {
divider_t() divider_t()
: m_divider(0) : m_divider(0)
, m_disable(0) , m_enable(0)
{ }; { };
void reset() void reset()
{ {
m_divider = 0; m_divider = 0;
m_disable = 0; m_enable = 0;
} }
void write(bool msb, u8 data); void write(bool msb, u8 data);
u16 m_divider : 12; // divider (pitch) u16 m_divider : 12; // divider (pitch)
u16 m_disable : 1; // channel disable flag u16 m_enable : 1; // channel enable flag
}; };
vrcvi_core &m_host; vrcvi_core &m_host;

View file

@ -204,10 +204,10 @@ void DivPlatformVRC6::tick() {
//rWrite(16+i*5+2,((chan[i].vol<<4))|(ins->gb.envLen&7)|((ins->gb.envDir&1)<<3)); //rWrite(16+i*5+2,((chan[i].vol<<4))|(ins->gb.envLen&7)|((ins->gb.envDir&1)<<3));
} }
if (chan[i].keyOff) { if (chan[i].keyOff) {
chWrite(i,2,0x80); chWrite(i,2,0);
} else { } else {
chWrite(i,1,chan[i].freq&0xff); chWrite(i,1,chan[i].freq&0xff);
chWrite(i,2,(chan[i].freq>>8)&0xf); chWrite(i,2,0x80|((chan[i].freq>>8)&0xf));
} }
if (chan[i].keyOn) chan[i].keyOn=false; if (chan[i].keyOn) chan[i].keyOn=false;
if (chan[i].keyOff) chan[i].keyOff=false; if (chan[i].keyOff) chan[i].keyOff=false;
@ -236,7 +236,7 @@ int DivPlatformVRC6::dispatch(DivCommand c) {
break; break;
} else { } else {
if (dumpWrites) { if (dumpWrites) {
chWrite(c.chan,2,0); chWrite(c.chan,2,0x80);
chWrite(c.chan,0,isMuted[c.chan]?0:0x80); chWrite(c.chan,0,isMuted[c.chan]?0:0x80);
addWrite(0xffff0000+(c.chan<<8),chan[c.chan].dacSample); addWrite(0xffff0000+(c.chan<<8),chan[c.chan].dacSample);
} }
@ -268,7 +268,7 @@ int DivPlatformVRC6::dispatch(DivCommand c) {
chan[c.chan].dacPeriod=0; chan[c.chan].dacPeriod=0;
chan[c.chan].dacRate=parent->getSample(chan[c.chan].dacSample)->rate; chan[c.chan].dacRate=parent->getSample(chan[c.chan].dacSample)->rate;
if (dumpWrites) { if (dumpWrites) {
chWrite(c.chan,2,0); chWrite(c.chan,2,0x80);
chWrite(c.chan,0,isMuted[c.chan]?0:0x80); chWrite(c.chan,0,isMuted[c.chan]?0:0x80);
addWrite(0xffff0001+(c.chan<<8),chan[c.chan].dacRate); addWrite(0xffff0001+(c.chan<<8),chan[c.chan].dacRate);
} }