dev167 - fix TL macro

previously, 127 mapped to TL 0
but now 127 maps to TL 127

yeah, the graph will look inverted I know...
This commit is contained in:
tildearrow 2023-08-21 23:57:07 -05:00
parent b35235b82e
commit 54934dcfc9
16 changed files with 32 additions and 16 deletions

View file

@ -195,7 +195,7 @@ void DivPlatformOPLL::tick(bool sysTick) {
rWrite(0x06+j,(op.sl<<4)|(op.rr));
}
if (m.tl.had) {
op.tl=((j==1)?15:63)-m.tl.val;
op.tl=m.tl.val&((j==1)?15:63);
if (j==1) {
if (i<9) {
rWrite(0x30+i,((15-VOL_SCALE_LOG_BROKEN(chan[i].outVol,15-chan[i].state.op[1].tl,15))&15)|(chan[i].state.opllPreset<<4));