Merge branch 'master' of https://github.com/tildearrow/furnace into es5506_alt
* 'master' of https://github.com/tildearrow/furnace: (44 commits) GUI: now add ability to load VMEM Update sysDef.cpp GUI: add an option for it add preliminary TX81Z SysEx response OPL: drum volume OPL: implement hard reset GUI: add icon size setting GUI: macro UI refactor, part 4 Fix WIN32 define timing in IGFD Fix outdated calling convention in SAASound (maybe fix MinGW) GUI: macro UI refactor, part 3 GUI: macro UI refactor, part 2 Masochism Volatile Compiler GUI: is the macro UI back yet OPL: fix 4-op muting (I think) GUI: macro UI refactor, part 1 - PLEASE READ GUI: remove classic macro view Maybe just enforce for C++ Forbid standard extensions .ftm loading progress (incomplete, not working) ... # Conflicts: # src/engine/instrument.h # src/gui/insEdit.cpp Transwave Checkpoint
This commit is contained in:
cam900
commit
4efa711a2b
59 changed files with 5835 additions and 881 deletions
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@ -77,6 +77,54 @@ const char* DivPlatformGenesis::getEffectName(unsigned char effect) {
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case 0x30:
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return "30xx: Toggle hard envelope reset on new notes";
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break;
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case 0x50:
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return "50xy: Set AM (x: operator from 1 to 4 (0 for all ops); y: AM)";
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break;
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case 0x51:
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return "51xy: Set sustain level (x: operator from 1 to 4 (0 for all ops); y: sustain)";
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break;
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case 0x52:
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return "52xy: Set release (x: operator from 1 to 4 (0 for all ops); y: release)";
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break;
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case 0x53:
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return "53xy: Set detune (x: operator from 1 to 4 (0 for all ops); y: detune where 3 is center)";
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break;
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case 0x54:
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return "54xy: Set envelope scale (x: operator from 1 to 4 (0 for all ops); y: scale from 0 to 3)";
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break;
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case 0x55:
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return "55xy: Set SSG envelope (x: operator from 1 to 4 (0 for all ops); y: 0-7 on, 8 off)";
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break;
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case 0x56:
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return "56xx: Set decay of all operators (0 to 1F)";
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break;
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case 0x57:
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return "57xx: Set decay of operator 1 (0 to 1F)";
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break;
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case 0x58:
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return "58xx: Set decay of operator 2 (0 to 1F)";
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break;
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case 0x59:
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return "59xx: Set decay of operator 3 (0 to 1F)";
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break;
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case 0x5a:
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return "5Axx: Set decay of operator 4 (0 to 1F)";
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break;
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case 0x5b:
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return "5Bxx: Set decay 2 of all operators (0 to 1F)";
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break;
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case 0x5c:
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return "5Cxx: Set decay 2 of operator 1 (0 to 1F)";
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break;
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case 0x5d:
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return "5Dxx: Set decay 2 of operator 2 (0 to 1F)";
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break;
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case 0x5e:
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return "5Exx: Set decay 2 of operator 3 (0 to 1F)";
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break;
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case 0x5f:
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return "5Fxx: Set decay 2 of operator 4 (0 to 1F)";
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break;
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}
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return NULL;
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}
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@ -782,7 +830,7 @@ int DivPlatformGenesis::dispatch(DivCommand c) {
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
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rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
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}
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} else {
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} else if (c.value<4) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
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op.ar=c.value2&31;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
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@ -790,6 +838,134 @@ int DivPlatformGenesis::dispatch(DivCommand c) {
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}
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break;
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}
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case DIV_CMD_FM_RS: {
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if (c.value<0) {
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for (int i=0; i<4; i++) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
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op.rs=c.value2&3;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
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rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
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}
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} else if (c.value<4) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
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op.rs=c.value2&3;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
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rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
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}
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break;
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}
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case DIV_CMD_FM_AM: {
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if (c.value<0) {
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for (int i=0; i<4; i++) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
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op.am=c.value2&1;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
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rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
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}
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} else if (c.value<4) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
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op.am=c.value2&1;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
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rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
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}
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break;
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}
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case DIV_CMD_FM_DR: {
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if (c.value<0) {
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for (int i=0; i<4; i++) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
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op.dr=c.value2&31;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
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rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
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}
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} else if (c.value<4) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
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op.dr=c.value2&31;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
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rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
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}
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break;
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}
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case DIV_CMD_FM_SL: {
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if (c.value<0) {
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for (int i=0; i<4; i++) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
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op.sl=c.value2&15;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
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rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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} else if (c.value<4) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
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op.sl=c.value2&15;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
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rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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break;
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}
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case DIV_CMD_FM_RR: {
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if (c.value<0) {
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for (int i=0; i<4; i++) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
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op.rr=c.value2&15;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
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rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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} else if (c.value<4) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
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op.rr=c.value2&15;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
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rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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break;
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}
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case DIV_CMD_FM_D2R: {
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if (c.value<0) {
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for (int i=0; i<4; i++) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
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op.d2r=c.value2&31;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
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rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
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}
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} else if (c.value<4) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
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op.d2r=c.value2&31;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
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rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
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}
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break;
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}
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case DIV_CMD_FM_DT: {
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if (c.value<0) {
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for (int i=0; i<4; i++) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
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op.dt=c.value&7;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
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rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
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}
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} else if (c.value<4) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
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op.dt=c.value2&7;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
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rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
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}
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break;
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}
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case DIV_CMD_FM_SSG: {
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if (c.value<0) {
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for (int i=0; i<4; i++) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
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op.ssgEnv=8^(c.value2&15);
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
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rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
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}
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} else if (c.value<4) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
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op.ssgEnv=8^(c.value2&15);
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
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rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
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}
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break;
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}
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case DIV_CMD_FM_HARD_RESET:
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chan[c.chan].hardReset=c.value;
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break;
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