OPL3: fix channel 7 hard reset

issue #2582
2025-06-21 04:07:59 -05:00 · 2025-06-21 04:07:59 -05:00 · 4af0345b03
parent 3f4c1ddf89
commit 4af0345b03
1 changed files with 1 additions and 1 deletions
--- a/src/engine/platform/opl.cpp
+++ b/src/engine/platform/opl.cpp
@ -1338,7 +1338,7 @@ void DivPlatformOPL::tick(bool sysTick) {
        unsigned char slot=slots[j][i];
        if (slot==255) continue;
        unsigned short baseAddr=slotMap[slot];
-        if (baseAddr>0x100) {
+        if (baseAddr>=0x100) {
          weWillWriteRRLater[(baseAddr&0xff)|32]=true;
        } else {
          weWillWriteRRLater[(baseAddr&0xff)]=true;