Prepare for TI-99/4A support
only works on MAME core only for now.
This commit is contained in:
parent
d3a3473f19
commit
3e953f57b3
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@ -30,7 +30,7 @@ class DivArcadeInterface: public ymfm::ymfm_interface {
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};
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};
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class DivPlatformArcade: public DivPlatformOPMBase {
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class DivPlatformArcade: public DivPlatformOPM {
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protected:
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protected:
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const unsigned short chanOffs[8]={
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const unsigned short chanOffs[8]={
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07
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@ -24,7 +24,7 @@
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#define NOTE_LINEAR(x) (((x)<<6)+baseFreqOff+log2(parent->song.tuning/440.0)*12.0*64.0)
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#define NOTE_LINEAR(x) (((x)<<6)+baseFreqOff+log2(parent->song.tuning/440.0)*12.0*64.0)
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class DivPlatformOPMBase: public DivPlatformFMBase {
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class DivPlatformOPM: public DivPlatformFMBase {
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protected:
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protected:
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const unsigned char ADDR_MULT_DT=0x40;
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const unsigned char ADDR_MULT_DT=0x40;
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const unsigned char ADDR_TL=0x60;
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const unsigned char ADDR_TL=0x60;
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@ -41,7 +41,7 @@ class DivPlatformOPMBase: public DivPlatformFMBase {
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0x00, 0x08, 0x10, 0x18
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0x00, 0x08, 0x10, 0x18
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};
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};
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DivPlatformOPMBase():
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DivPlatformOPM():
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DivPlatformFMBase() {}
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DivPlatformFMBase() {}
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};
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};
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@ -1723,7 +1723,7 @@ void DivPlatformOPL::setFlags(unsigned int flags) {
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chipClock=3000000.0;
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chipClock=3000000.0;
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break;
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break;
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case 0x04:
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case 0x04:
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chipClock=31948800/8;
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chipClock=38400*13*8; // 31948800/8
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break;
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break;
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case 0x05:
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case 0x05:
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chipClock=3500000.0;
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chipClock=3500000.0;
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@ -472,8 +472,12 @@ void DivPlatformSMS::setFlags(unsigned int flags) {
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case 0x0101:
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case 0x0101:
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chipClock=2000000;
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chipClock=2000000;
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break;
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break;
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case 0x0102:
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chipClock=COLOR_NTSC/8.0;
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break;
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}
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}
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resetPhase=!(flags&16);
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resetPhase=!(flags&16);
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divider=16;
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noiseDivider=64;
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noiseDivider=64;
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if (sn!=NULL) delete sn;
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if (sn!=NULL) delete sn;
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switch (flags&0xcc) {
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switch (flags&0xcc) {
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@ -524,8 +528,22 @@ void DivPlatformSMS::setFlags(unsigned int flags) {
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noiseDivider=64;
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noiseDivider=64;
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stereo=false;
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stereo=false;
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break;
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break;
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case 0x80: // TI SN94624
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sn=new sn94624_device();
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isRealSN=true;
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noiseDivider=60;
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stereo=false;
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divider=2;
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break;
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case 0x84: // TI SN76494
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sn=new sn76494_device();
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isRealSN=false; // TODO
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noiseDivider=68;
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stereo=false;
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divider=2;
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break;
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}
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}
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rate=nuked?chipClock/16:chipClock/2;
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rate=chipClock/divider;
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for (int i=0; i<4; i++) {
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for (int i=0; i<4; i++) {
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oscBuf[i]->rate=rate;
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oscBuf[i]->rate=rate;
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}
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}
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@ -63,6 +63,7 @@ class DivPlatformSMS: public DivDispatch {
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size_t snBufLen;
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size_t snBufLen;
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unsigned char oldValue;
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unsigned char oldValue;
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unsigned char snNoiseMode;
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unsigned char snNoiseMode;
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int divider=16;
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int noiseDivider=64;
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int noiseDivider=64;
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bool updateSNMode;
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bool updateSNMode;
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bool resetPhase;
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bool resetPhase;
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@ -171,22 +171,22 @@ sn76496_base_device::sn76496_base_device(
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}
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}
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sn76496_device::sn76496_device()
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sn76496_device::sn76496_device()
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: sn76496_base_device(0x10000, 0x04, 0x08, false, false, 8, false, true)
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: sn76496_base_device(0x10000, 0x04, 0x08, false, false, 1/*8*/, false, true)
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{
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{
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}
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}
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y2404_device::y2404_device()
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y2404_device::y2404_device()
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: sn76496_base_device(0x10000, 0x04, 0x08, false, false, 8, false, true)
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: sn76496_base_device(0x10000, 0x04, 0x08, false, false, 1/*8*/, false, true)
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{
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{
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}
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}
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sn76489_device::sn76489_device()
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sn76489_device::sn76489_device()
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: sn76496_base_device(0x4000, 0x01, 0x02, true, false, 8, false, true)
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: sn76496_base_device(0x4000, 0x01, 0x02, true, false, 1/*8*/, false, true)
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{
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{
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}
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}
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sn76489a_device::sn76489a_device()
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sn76489a_device::sn76489a_device()
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: sn76496_base_device(0x10000, 0x04, 0x08, false, false, 8, false, true)
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: sn76496_base_device(0x10000, 0x04, 0x08, false, false, 1/*8*/, false, true)
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{
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{
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}
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}
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@ -201,22 +201,22 @@ sn94624_device::sn94624_device()
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}
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}
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ncr8496_device::ncr8496_device()
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ncr8496_device::ncr8496_device()
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: sn76496_base_device(0x8000, 0x02, 0x20, true, false, 8, true, true)
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: sn76496_base_device(0x8000, 0x02, 0x20, true, false, 1/*8*/, true, true)
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{
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{
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}
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}
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pssj3_device::pssj3_device()
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pssj3_device::pssj3_device()
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: sn76496_base_device(0x8000, 0x02, 0x20, false, false, 8, true, true)
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: sn76496_base_device(0x8000, 0x02, 0x20, false, false, 1/*8*/, true, true)
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{
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{
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}
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}
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gamegear_device::gamegear_device()
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gamegear_device::gamegear_device()
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: sn76496_base_device(0x8000, 0x01, 0x08, true, true, 8, false, false)
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: sn76496_base_device(0x8000, 0x01, 0x08, true, true, 1/*8*/, false, false)
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{
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{
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}
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}
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segapsg_device::segapsg_device()
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segapsg_device::segapsg_device()
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: sn76496_base_device(0x8000, 0x01, 0x08, true, false, 8, false, false)
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: sn76496_base_device(0x8000, 0x01, 0x08, true, false, 1/*8*/, false, false)
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{
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{
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}
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}
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@ -29,7 +29,7 @@ class DivTXInterface: public ymfm::ymfm_interface {
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};
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};
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class DivPlatformTX81Z: public DivPlatformOPMBase {
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class DivPlatformTX81Z: public DivPlatformOPM {
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protected:
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protected:
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const unsigned short chanOffs[8]={
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const unsigned short chanOffs[8]={
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07
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@ -1027,7 +1027,7 @@ void DivPlatformYM2203::setFlags(unsigned int flags) {
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chipClock=3000000.0;
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chipClock=3000000.0;
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break;
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break;
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case 0x04:
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case 0x04:
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chipClock=31948800/8;
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chipClock=38400*13*8; // 31948800/8
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break;
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break;
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case 0x05:
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case 0x05:
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chipClock=3000000.0/2.0;
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chipClock=3000000.0/2.0;
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@ -1400,7 +1400,7 @@ void DivPlatformYM2608::setFlags(unsigned int flags) {
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chipClock=8000000.0;
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chipClock=8000000.0;
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break;
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break;
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case 0x01:
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case 0x01:
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chipClock=31948800/4;
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chipClock=38400*13*16; // 31948800/4
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break;
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break;
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}
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}
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rate=fm->sample_rate(chipClock);
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rate=fm->sample_rate(chipClock);
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@ -244,6 +244,7 @@ struct DivSong {
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// - 0003: 1.79MHz (half NTSC)
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// - 0003: 1.79MHz (half NTSC)
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// - 0100: 3MHz
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// - 0100: 3MHz
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// - 0101: 2MHz
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// - 0101: 2MHz
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// - 0102: 447KHz (NTSC / 8)
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// - bit 2-3, 6-7: chip type
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// - bit 2-3, 6-7: chip type
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// - 00: Sega VDP (16-bit noise)
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// - 00: Sega VDP (16-bit noise)
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// - 04: real SN76489 (15-bit noise)
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// - 04: real SN76489 (15-bit noise)
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@ -253,6 +254,8 @@ struct DivSong {
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// - 44: real SN76496 (17-bit noise)
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// - 44: real SN76496 (17-bit noise)
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// - 48: NCR 8496 (16-bit noise)
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// - 48: NCR 8496 (16-bit noise)
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// - 4c: Tandy PSSJ-3 (16-bit noise)
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// - 4c: Tandy PSSJ-3 (16-bit noise)
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// - 80: real SN94624 (15-bit noise)
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// - 84: real SN76494 (17-bit noise)
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// - bit 4: disable noise phase reset
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// - bit 4: disable noise phase reset
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// - YM2612/YM3438:
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// - YM2612/YM3438:
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// - bit 0-30: clock rate
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// - bit 0-30: clock rate
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@ -1211,6 +1211,12 @@ void FurnaceGUI::initSystemPresets() {
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0
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0
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}
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}
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));
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));
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cat.systems.push_back(FurnaceGUISysDef(
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"TI-99/4A", {
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DIV_SYSTEM_SMS, 64, 0, 0x182, // SN94624 447KHz
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0
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}
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));
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sysCategories.push_back(cat);
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sysCategories.push_back(cat);
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cat=FurnaceGUISysCategory("Arcade systems","INSERT COIN");
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cat=FurnaceGUISysCategory("Arcade systems","INSERT COIN");
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@ -69,6 +69,9 @@ void FurnaceGUI::drawSysConf(int chan, DivSystem type, unsigned int& flags, bool
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if (ImGui::RadioButton("2MHz (Sega System 1)",(flags&0xff03)==0x0101)) {
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if (ImGui::RadioButton("2MHz (Sega System 1)",(flags&0xff03)==0x0101)) {
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copyOfFlags=(flags&(~0xff03))|0x0101;
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copyOfFlags=(flags&(~0xff03))|0x0101;
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}
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}
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if (ImGui::RadioButton("447KHz (TI-99/4A)",(flags&0xff03)==0x0102)) {
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copyOfFlags=(flags&(~0xff03))|0x0102;
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}
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ImGui::Text("Chip type:");
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ImGui::Text("Chip type:");
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if (ImGui::RadioButton("Sega VDP/Master System",(flags&0xcc)==0x00)) {
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if (ImGui::RadioButton("Sega VDP/Master System",(flags&0xcc)==0x00)) {
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copyOfFlags=(flags&(~0xcc))|0x00;
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copyOfFlags=(flags&(~0xcc))|0x00;
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@ -94,6 +97,12 @@ void FurnaceGUI::drawSysConf(int chan, DivSystem type, unsigned int& flags, bool
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if (ImGui::RadioButton("Tandy PSSJ 3-voice sound",(flags&0xcc)==0x4c)) {
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if (ImGui::RadioButton("Tandy PSSJ 3-voice sound",(flags&0xcc)==0x4c)) {
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copyOfFlags=(flags&(~0xcc))|0x4c;
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copyOfFlags=(flags&(~0xcc))|0x4c;
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}
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}
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if (ImGui::RadioButton("TI SN94624",(flags&0xcc)==0x80)) {
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copyOfFlags=(flags&(~0xcc))|0x80;
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}
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if (ImGui::RadioButton("TI SN76494",(flags&0xcc)==0x84)) {
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copyOfFlags=(flags&(~0xcc))|0x84;
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}
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bool noPhaseReset=flags&16;
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bool noPhaseReset=flags&16;
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if (ImGui::Checkbox("Disable noise period change phase reset",&noPhaseReset)) {
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if (ImGui::Checkbox("Disable noise period change phase reset",&noPhaseReset)) {
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copyOfFlags=(flags&(~16))|(noPhaseReset<<4);
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copyOfFlags=(flags&(~16))|(noPhaseReset<<4);
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Reference in a new issue