Merge pull request #1199 from mooinglemur/20230705-zsmsync
VERA, ZSM Export: Add EExx event as synchronization message, add sync message support in ZSM export
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commit
3d79827d55
9 changed files with 67 additions and 24 deletions
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@ -236,6 +236,8 @@ enum DivDispatchCmds {
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DIV_CMD_NES_LINEAR_LENGTH,
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DIV_CMD_EXTERNAL, // (value)
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DIV_ALWAYS_SET_VOLUME, // () -> alwaysSetVol
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DIV_CMD_MAX
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@ -37,6 +37,7 @@ extern "C" {
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#define rWritePCMRate(d) {regPool[65]=(d); pcm_write_rate(pcm,d);if (dumpWrites) addWrite(65,(d));}
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#define rWritePCMData(d) {regPool[66]=(d); pcm_write_fifo(pcm,d);}
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#define rWritePCMVol(d) rWritePCMCtrl((regPool[64]&(~0x8f))|((d)&15))
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#define rWriteZSMSync(d) {if (dumpWrites) addWrite(68,(d));}
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const char* regCheatSheetVERA[]={
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"CHxFreq", "00+x*4",
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@ -46,6 +47,7 @@ const char* regCheatSheetVERA[]={
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"AUDIO_CTRL", "40",
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"AUDIO_RATE", "41",
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"AUDIO_DATA", "42",
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"ZSM_SYNC", "44",
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NULL
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};
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@ -414,6 +416,9 @@ int DivPlatformVERA::dispatch(DivCommand c) {
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case DIV_CMD_MACRO_ON:
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chan[c.chan].std.mask(c.value,false);
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break;
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case DIV_CMD_EXTERNAL:
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rWriteZSMSync(c.value);
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break;
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case DIV_ALWAYS_SET_VOLUME:
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return 0;
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break;
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@ -51,7 +51,7 @@ class DivPlatformVERA: public DivDispatch {
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Channel chan[17];
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DivDispatchOscBuffer* oscBuf[17];
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bool isMuted[17];
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unsigned char regPool[67];
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unsigned char regPool[69];
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struct VERA_PSG* psg;
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struct VERA_PCM* pcm;
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@ -236,6 +236,8 @@ const char* cmdName[]={
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"NES_LINEAR_LENGTH",
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"EXTERNAL",
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"ALWAYS_SET_VOLUME"
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};
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@ -913,6 +915,7 @@ void DivEngine::processRow(int i, bool afterDelay) {
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//printf("\x1b[1;36m%d: extern command %d\x1b[m\n",i,effectVal);
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extValue=effectVal;
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extValuePresent=true;
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dispatchCmd(DivCommand(DIV_CMD_EXTERNAL,effectVal));
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break;
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case 0xef: // global pitch
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globalPitch+=(signed char)(effectVal-0x80);
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@ -118,9 +118,13 @@ void DivZSM::writePSG(unsigned char a, unsigned char v) {
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// TODO: suppress writes to PSG voice that is not audible (volume=0)
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// ^ Let's leave these alone, ZSMKit has a feature that can benefit
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// from silent channels.
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if (a>=67) {
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logD ("ZSM: ignoring VERA PSG write a=%02x v=%02x",a,v);
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if (a>=69) {
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logD("ZSM: ignoring VERA PSG write a=%02x v=%02x",a,v);
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return;
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} else if (a==68) {
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// Sync event
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numWrites++;
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return syncCache.push_back(v);
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} else if (a>=64) {
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return writePCM(a-64,v);
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}
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@ -259,7 +263,7 @@ SafeWriter* DivZSM::finish() {
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}
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void DivZSM::flushWrites() {
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logD("ZSM: flushWrites.... numwrites=%d ticks=%d ymwrites=%d pcmMeta=%d pcmCache=%d pcmData=%d",numWrites,ticks,ymwrites.size(),pcmMeta.size(),pcmCache.size(),pcmData.size());
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logD("ZSM: flushWrites.... numwrites=%d ticks=%d ymwrites=%d pcmMeta=%d pcmCache=%d pcmData=%d syncCache=%d",numWrites,ticks,ymwrites.size(),pcmMeta.size(),pcmCache.size(),pcmData.size(),syncCache.size());
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if (numWrites==0) return;
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flushTicks(); // only flush ticks if there are writes pending.
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for (unsigned char i=0; i<64; i++) {
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@ -287,43 +291,43 @@ void DivZSM::flushWrites() {
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unsigned int pcmInst=0;
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int pcmOff=0;
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int pcmLen=0;
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int extCmdLen=pcmMeta.size()*2;
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int extCmd0Len=pcmMeta.size()*2;
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if (pcmCache.size()) {
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// collapse stereo data to mono if both channels are fully identical
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// which cuts PCM data size in half for center-panned PCM events
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if (pcmCtrlDCCache & 0x10) { // stereo bit is on
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if (pcmCtrlDCCache&0x10) { // stereo bit is on
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unsigned int e;
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if (pcmCtrlDCCache & 0x20) { // 16-bit
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if (pcmCtrlDCCache&0x20) { // 16-bit
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// for 16-bit PCM data, the size must be a multiple of 4
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if (pcmCache.size()%4==0) {
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// check for identical L+R channels
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for (e=0;e<pcmCache.size();e+=4) {
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for (e=0; e<pcmCache.size(); e+=4) {
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if (pcmCache[e]!=pcmCache[e+2] || pcmCache[e+1]!=pcmCache[e+3]) break;
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}
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if (e==pcmCache.size()) { // did not find a mismatch
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// collapse the data to mono 16-bit
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for (e=0;e<pcmCache.size()>>1;e+=2) {
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for (e=0; e<pcmCache.size()>>1; e+=2) {
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pcmCache[e]=pcmCache[e<<1];
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pcmCache[e+1]=pcmCache[(e<<1)+1];
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}
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pcmCache.resize(pcmCache.size()>>1);
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pcmCtrlDCCache &= ~0x10; // clear stereo bit
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pcmCtrlDCCache&=(unsigned char)~0x10; // clear stereo bit
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}
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}
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} else { // 8-bit
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// for 8-bit PCM data, the size must be a multiple of 2
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if (pcmCache.size()%2==0) {
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// check for identical L+R channels
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for (e=0;e<pcmCache.size();e+=2) {
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for (e=0; e<pcmCache.size(); e+=2) {
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if (pcmCache[e]!=pcmCache[e+1]) break;
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}
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if (e==pcmCache.size()) { // did not find a mismatch
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// collapse the data to mono 8-bit
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for (e=0;e<pcmCache.size()>>1;e++) {
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for (e=0; e<pcmCache.size()>>1; e++) {
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pcmCache[e]=pcmCache[e<<1];
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}
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pcmCache.resize(pcmCache.size()>>1);
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pcmCtrlDCCache &= ~0x10; // clear stereo bit
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pcmCtrlDCCache&=(unsigned char)~0x10; // clear stereo bit
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}
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}
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}
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@ -340,7 +344,7 @@ void DivZSM::flushWrites() {
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pcmData.insert(pcmData.end(),pcmCache.begin(),pcmCache.end());
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}
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pcmCache.clear();
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extCmdLen+=2;
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extCmd0Len+=2;
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// search for a matching PCM instrument definition
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for (S_pcmInst& inst: pcmInsts) {
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if (inst.offset==pcmOff && inst.length==pcmLen && inst.geometry==pcmCtrlDCCache)
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@ -355,14 +359,14 @@ void DivZSM::flushWrites() {
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pcmInsts.push_back(inst);
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}
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}
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if (extCmdLen>63) { // this would be bad, but will almost certainly never happen
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logE("ZSM: extCmd exceeded maximum length of 63: %d",extCmdLen);
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extCmdLen=0;
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if (extCmd0Len>63) { // this would be bad, but will almost certainly never happen
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logE("ZSM: extCmd 0 exceeded maximum length of 63: %d",extCmd0Len);
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extCmd0Len=0;
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pcmMeta.clear();
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}
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if (extCmdLen) { // we have some PCM events to write
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w->writeC(0x40);
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w->writeC((unsigned char)extCmdLen); // the high two bits are guaranteed to be zero, meaning this is a PCM command
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if (extCmd0Len) { // we have some PCM events to write
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w->writeC(ZSM_EXT);
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w->writeC(ZSM_EXT_PCM|(unsigned char)extCmd0Len);
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for (DivRegWrite& write: pcmMeta) {
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w->writeC(write.addr);
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w->writeC(write.val);
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@ -373,6 +377,18 @@ void DivZSM::flushWrites() {
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w->writeC((unsigned char)pcmInst&0xff);
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}
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}
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n=0;
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while (n<(long)syncCache.size()) { // we have one or more sync events to write
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int writes=syncCache.size()-n;
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w->writeC(ZSM_EXT);
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if (writes>ZSM_SYNC_MAX_WRITES) writes=ZSM_SYNC_MAX_WRITES;
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w->writeC(ZSM_EXT_SYNC|(writes<<1));
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for (; writes>0; writes--) {
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w->writeC(0x00); // 0x00 = Arbitrary sync message
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w->writeC(syncCache[n++]);
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}
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}
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syncCache.clear();
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numWrites=0;
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}
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@ -30,9 +30,16 @@
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#define ZSM_YM_CMD 0x40
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#define ZSM_DELAY_CMD 0x80
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#define ZSM_YM_MAX_WRITES 63
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#define ZSM_SYNC_MAX_WRITES 31
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#define ZSM_DELAY_MAX 127
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#define ZSM_EOF ZSM_DELAY_CMD
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#define ZSM_EXT ZSM_YM_CMD
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#define ZSM_EXT_PCM 0x00
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#define ZSM_EXT_CHIP 0x40
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#define ZSM_EXT_SYNC 0x80
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#define ZSM_EXT_CUSTOM 0xC0
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enum YM_STATE { ym_PREV, ym_NEW, ym_STATES };
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enum PSG_STATE { psg_PREV, psg_NEW, psg_STATES };
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@ -52,6 +59,7 @@ class DivZSM {
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std::vector<unsigned char> pcmData;
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std::vector<unsigned char> pcmCache;
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std::vector<S_pcmInst> pcmInsts;
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std::vector<unsigned char> syncCache;
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int loopOffset;
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int numWrites;
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int ticks;
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@ -151,7 +151,7 @@ SafeWriter* DivEngine::saveZSM(unsigned int zsmrate, bool loop) {
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for (DivRegWrite& write: writes) {
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if (i==YM) zsm.writeYM(write.addr&0xff,write.val);
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if (i==VERA) {
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if (done && write.addr >= 64) continue; // don't process any PCM events on the loop lookahead
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if (done && write.addr>=64) continue; // don't process any PCM or sync events on the loop lookahead
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zsm.writePSG(write.addr&0xff,write.val);
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}
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}
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