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OPNA/B: fix SSG DAC/TFX not working with LLE core

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tildearrow 2025-08-19 04:23:58 -05:00
parent e9924aeb4b
commit 3b37a5334a
3 changed files with 30 additions and 0 deletions
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10
src/engine/platform/ym2608.cpp
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@ -531,6 +531,16 @@ void DivPlatformYM2608::acquire_lle(short** buf, size_t len) {
signed char subCycle=0;
unsigned char subSubCycle=0;
// AY -> OPN
ay->runDAC();
ay->runTFX(rate);
ay->flushWrites();
for (DivRegWrite& i: ay->getRegisterWrites()) {
if (i.addr>15) continue;
immWrite(i.addr&15,i.val);
}
ay->getRegisterWrites().clear();
for (int i=0; i<6; i++) {
fmOut[i]=0;
}

10
src/engine/platform/ym2610.cpp
View file

@ -465,6 +465,16 @@ void DivPlatformYM2610::acquire_lle(short** buf, size_t len) {
signed char subCycle=0;
unsigned char subSubCycle=0;
// AY -> OPN
ay->runDAC();
ay->runTFX(rate);
ay->flushWrites();
for (DivRegWrite& i: ay->getRegisterWrites()) {
if (i.addr>15) continue;
immWrite(i.addr&15,i.val);
}
ay->getRegisterWrites().clear();
for (int i=0; i<6; i++) {
fmOut[i]=0;
}

10
src/engine/platform/ym2610b.cpp
View file

@ -533,6 +533,16 @@ void DivPlatformYM2610B::acquire_lle(short** buf, size_t len) {
signed char subCycle=0;
unsigned char subSubCycle=0;
// AY -> OPN
ay->runDAC();
ay->runTFX(rate);
ay->flushWrites();
for (DivRegWrite& i: ay->getRegisterWrites()) {
if (i.addr>15) continue;
immWrite(i.addr&15,i.val);
}
ay->getRegisterWrites().clear();
for (int i=0; i<6; i++) {
fmOut[i]=0;
}