SCC: VGM export, forceIns bug fix and 10xx
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0c0a97c21b
commit
35ff5430d3
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@ -21,7 +21,7 @@
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#include "../engine.h"
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#include "../engine.h"
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#include <math.h>
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#include <math.h>
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#define CHIP_DIVIDER 32
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#define CHIP_DIVIDER 16
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#define rWrite(a,v) {if (!skipRegisterWrites) {scc->scc_w(true,a,v); regPool[a]=v; if (dumpWrites) addWrite(a,v); }}
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#define rWrite(a,v) {if (!skipRegisterWrites) {scc->scc_w(true,a,v); regPool[a]=v; if (dumpWrites) addWrite(a,v); }}
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@ -281,7 +281,9 @@ void DivPlatformSCC::forceIns() {
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for (int i=0; i<5; i++) {
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for (int i=0; i<5; i++) {
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chan[i].insChanged=true;
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chan[i].insChanged=true;
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chan[i].freqChanged=true;
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chan[i].freqChanged=true;
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updateWave(i);
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if (chan[i].active) {
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updateWave(i);
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}
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}
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}
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}
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}
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@ -326,7 +328,9 @@ void DivPlatformSCC::notifyWaveChange(int wave) {
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for (int i=0; i<5; i++) {
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for (int i=0; i<5; i++) {
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if (chan[i].wave==wave) {
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if (chan[i].wave==wave) {
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chan[i].ws.changeWave1(chan[i].wave);
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chan[i].ws.changeWave1(chan[i].wave);
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updateWave(i);
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if (chan[i].active) {
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updateWave(i);
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}
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}
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}
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}
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}
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}
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}
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@ -358,8 +362,8 @@ int DivPlatformSCC::init(DivEngine* p, int channels, int sugRate, unsigned int f
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isMuted[i]=false;
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isMuted[i]=false;
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oscBuf[i]=new DivDispatchOscBuffer;
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oscBuf[i]=new DivDispatchOscBuffer;
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}
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}
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chipClock=COLOR_NTSC;
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chipClock=COLOR_NTSC/2.0;
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rate=chipClock/16;
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rate=chipClock/8;
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for (int i=0; i<5; i++) {
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for (int i=0; i<5; i++) {
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oscBuf[i]->rate=rate;
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oscBuf[i]->rate=rate;
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}
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}
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@ -1459,11 +1459,13 @@ void DivEngine::registerSystems() {
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);
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);
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sysDefs[DIV_SYSTEM_SCC]=new DivSysDef(
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sysDefs[DIV_SYSTEM_SCC]=new DivSysDef(
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"Konami SCC", NULL, 0xa1, 0, 5, false, true, 0, false,
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"Konami SCC", NULL, 0xa1, 0, 5, false, true, 0x161, false,
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{"Channel 1", "Channel 2", "Channel 3", "Channel 4", "Channel 5"},
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{"Channel 1", "Channel 2", "Channel 3", "Channel 4", "Channel 5"},
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{"CH1", "CH2", "CH3", "CH4", "CH5"},
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{"CH1", "CH2", "CH3", "CH4", "CH5"},
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{DIV_CH_WAVE, DIV_CH_WAVE, DIV_CH_WAVE, DIV_CH_WAVE, DIV_CH_WAVE},
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{DIV_CH_WAVE, DIV_CH_WAVE, DIV_CH_WAVE, DIV_CH_WAVE, DIV_CH_WAVE},
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{DIV_INS_SCC, DIV_INS_SCC, DIV_INS_SCC, DIV_INS_SCC, DIV_INS_SCC}
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{DIV_INS_SCC, DIV_INS_SCC, DIV_INS_SCC, DIV_INS_SCC, DIV_INS_SCC},
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{},
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waveOnlyEffectHandler
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);
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);
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auto oplDrumsEffectHandler=[this](int ch, unsigned char effect, unsigned char effectVal) -> bool {
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auto oplDrumsEffectHandler=[this](int ch, unsigned char effect, unsigned char effectVal) -> bool {
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@ -1740,11 +1742,13 @@ void DivEngine::registerSystems() {
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);
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);
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sysDefs[DIV_SYSTEM_SCC_PLUS]=new DivSysDef(
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sysDefs[DIV_SYSTEM_SCC_PLUS]=new DivSysDef(
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"Konami SCC+", NULL, 0xb4, 0, 5, false, true, 0, false,
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"Konami SCC+", NULL, 0xb4, 0, 5, false, true, 0x161, false,
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{"Channel 1", "Channel 2", "Channel 3", "Channel 4", "Channel 5"},
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{"Channel 1", "Channel 2", "Channel 3", "Channel 4", "Channel 5"},
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{"CH1", "CH2", "CH3", "CH4", "CH5"},
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{"CH1", "CH2", "CH3", "CH4", "CH5"},
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{DIV_CH_WAVE, DIV_CH_WAVE, DIV_CH_WAVE, DIV_CH_WAVE, DIV_CH_WAVE},
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{DIV_CH_WAVE, DIV_CH_WAVE, DIV_CH_WAVE, DIV_CH_WAVE, DIV_CH_WAVE},
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{DIV_INS_SCC, DIV_INS_SCC, DIV_INS_SCC, DIV_INS_SCC, DIV_INS_SCC}
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{DIV_INS_SCC, DIV_INS_SCC, DIV_INS_SCC, DIV_INS_SCC, DIV_INS_SCC},
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{},
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waveOnlyEffectHandler
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);
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);
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sysDefs[DIV_SYSTEM_SOUND_UNIT]=new DivSysDef(
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sysDefs[DIV_SYSTEM_SOUND_UNIT]=new DivSysDef(
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@ -598,6 +598,36 @@ void DivEngine::performVGMWrite(SafeWriter* w, DivSystem sys, DivRegWrite& write
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break;
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break;
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}
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}
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break;
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break;
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case DIV_SYSTEM_SCC:
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if (write.addr<0x80) {
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w->writeC(0xd2);
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w->writeC(0);
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w->writeC(baseAddr2|(write.addr&0x7f));
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w->writeC(write.val&0xff);
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} else if (write.addr<0x8a) {
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w->writeC(0xd2);
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w->writeC(1);
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w->writeC(baseAddr2|((write.addr-0x80)&0x7f));
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w->writeC(write.val&0xff);
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} else if (write.addr<0x8f) {
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w->writeC(0xd2);
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w->writeC(2);
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w->writeC(baseAddr2|((write.addr-0x8a)&0x7f));
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w->writeC(write.val&0xff);
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} else if (write.addr<0x90) {
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w->writeC(0xd2);
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w->writeC(3);
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w->writeC(baseAddr2|((write.addr-0x8f)&0x7f));
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w->writeC(write.val&0xff);
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} else if (write.addr>=0xe0) {
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w->writeC(0xd2);
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w->writeC(5);
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w->writeC(baseAddr2|((write.addr-0xe0)&0x7f));
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w->writeC(write.val&0xff);
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} else {
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logW("SCC: writing to unmapped address %.2x!",write.addr);
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}
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break;
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default:
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default:
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logW("write not handled!");
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logW("write not handled!");
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break;
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break;
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@ -988,6 +1018,24 @@ SafeWriter* DivEngine::saveVGM(bool* sysToExport, bool loop, int version) {
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howManyChips++;
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howManyChips++;
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}
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}
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break;
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break;
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case DIV_SYSTEM_SCC:
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case DIV_SYSTEM_SCC_PLUS:
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if (!hasK051649) {
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hasK051649=disCont[i].dispatch->chipClock;
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if (song.system[i]==DIV_SYSTEM_SCC_PLUS) {
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hasK051649|=0x80000000;
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}
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willExport[i]=true;
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} else if (!(hasK051649&0x40000000)) {
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isSecond[i]=true;
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willExport[i]=true;
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hasK051649|=0x40000000;
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if (song.system[i]==DIV_SYSTEM_SCC_PLUS) {
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hasK051649|=0x80000000;
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}
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howManyChips++;
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}
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break;
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default:
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default:
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break;
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break;
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}
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}
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