Merge branch 'master' into preset1
This commit is contained in:
commit
35caab6f82
119 changed files with 1593 additions and 371 deletions
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@ -347,7 +347,7 @@ void DivPlatformOPL::tick(bool sysTick) {
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chan[i].std.next();
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if (chan[i].std.vol.had) {
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chan[i].outVol=(chan[i].vol*MIN(63,chan[i].std.vol.val))/63;
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chan[i].outVol=VOL_SCALE_LOG(chan[i].vol,MIN(63,chan[i].std.vol.val),63);
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for (int j=0; j<ops; j++) {
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unsigned char slot=slots[j][i];
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if (slot==255) continue;
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@ -358,7 +358,7 @@ void DivPlatformOPL::tick(bool sysTick) {
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rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
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} else {
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if (isOutputL[ops==4][chan[i].state.alg][j] || i>melodicChans) {
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rWrite(baseAddr+ADDR_KSL_TL,(63-(((63-op.tl)*(chan[i].outVol&0x3f))/63))|(op.ksl<<6));
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rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[i].outVol&0x3f,63))|(op.ksl<<6));
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} else {
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rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
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}
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@ -485,7 +485,7 @@ void DivPlatformOPL::tick(bool sysTick) {
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rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
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} else {
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if (isOutputL[ops==4][chan[i].state.alg][j] || i>melodicChans) {
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rWrite(baseAddr+ADDR_KSL_TL,(63-(((63-op.tl)*(chan[i].outVol&0x3f))/63))|(op.ksl<<6));
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rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[i].outVol&0x3f,63))|(op.ksl<<6));
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} else {
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rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
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}
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@ -694,7 +694,7 @@ void DivPlatformOPL::muteChannel(int ch, bool mute) {
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rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
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} else {
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if (isOutputL[ops==4][chan[ch].state.alg][i] || ch>melodicChans) {
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rWrite(baseAddr+ADDR_KSL_TL,(63-(((63-op.tl)*(chan[ch].outVol&0x3f))/63))|(op.ksl<<6));
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rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[ch].outVol&0x3f,63))|(op.ksl<<6));
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} else {
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rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
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}
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@ -825,7 +825,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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if (isMuted[ch]) {
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rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
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} else {
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rWrite(baseAddr+ADDR_KSL_TL,(63-(((63-op.tl)*(chan[ch].outVol&0x3f))/63))|(op.ksl<<6));
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rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[ch].outVol&0x3f,63))|(op.ksl<<6));
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}
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rWrite(baseAddr+ADDR_AM_VIB_SUS_KSR_MULT,(op.am<<7)|(op.vib<<6)|(op.sus<<5)|(op.ksr<<4)|op.mult);
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@ -860,7 +860,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
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} else {
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if (isOutputL[ops==4][chan[c.chan].state.alg][i] || c.chan>melodicChans) {
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rWrite(baseAddr+ADDR_KSL_TL,(63-(((63-op.tl)*(chan[c.chan].outVol&0x3f))/63))|(op.ksl<<6));
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rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[c.chan].outVol&0x3f,63))|(op.ksl<<6));
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} else {
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rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
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}
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@ -976,7 +976,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
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} else {
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if (isOutputL[ops==4][chan[c.chan].state.alg][i] || c.chan>melodicChans) {
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rWrite(baseAddr+ADDR_KSL_TL,(63-(((63-op.tl)*(chan[c.chan].outVol&0x3f))/63))|(op.ksl<<6));
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rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[c.chan].outVol&0x3f,63))|(op.ksl<<6));
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} else {
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rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
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}
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@ -1125,7 +1125,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
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} else {
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if (isOutputL[ops==4][chan[c.chan].state.alg][c.value] || c.chan>melodicChans) {
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rWrite(baseAddr+ADDR_KSL_TL,(63-(((63-op.tl)*(chan[c.chan].outVol&0x3f))/63))|(op.ksl<<6));
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rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[c.chan].outVol&0x3f,63))|(op.ksl<<6));
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} else {
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rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
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}
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@ -1355,7 +1355,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
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} else {
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if (isOutputL[ops==4][chan[c.chan].state.alg][i] || c.chan>melodicChans) {
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rWrite(baseAddr+ADDR_KSL_TL,(63-(((63-op.tl)*(chan[c.chan].outVol&0x3f))/63))|(op.ksl<<6));
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rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[c.chan].outVol&0x3f,63))|(op.ksl<<6));
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} else {
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rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
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}
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@ -1372,7 +1372,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
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} else {
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if (isOutputL[ops==4][chan[c.chan].state.alg][c.value] || c.chan>melodicChans) {
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rWrite(baseAddr+ADDR_KSL_TL,(63-(((63-op.tl)*(chan[c.chan].outVol&0x3f))/63))|(op.ksl<<6));
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rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[c.chan].outVol&0x3f,63))|(op.ksl<<6));
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} else {
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rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
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}
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@ -1446,7 +1446,7 @@ void DivPlatformOPL::forceIns() {
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rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
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} else {
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if (isOutputL[ops==4][chan[i].state.alg][j] || i>melodicChans) {
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rWrite(baseAddr+ADDR_KSL_TL,(63-(((63-op.tl)*(chan[i].outVol&0x3f))/63))|(op.ksl<<6));
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rWrite(baseAddr+ADDR_KSL_TL,(63-VOL_SCALE_LOG(63-op.tl,chan[i].outVol&0x3f,63))|(op.ksl<<6));
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} else {
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rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
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}
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@ -1488,6 +1488,10 @@ void* DivPlatformOPL::getChanState(int ch) {
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return &chan[ch];
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}
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DivMacroInt* DivPlatformOPL::getChanMacroInt(int ch) {
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return &chan[ch].std;
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}
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DivDispatchOscBuffer* DivPlatformOPL::getOscBuffer(int ch) {
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if (ch>=18) return NULL;
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return oscBuf[ch];
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