separate noise frequency, almost all main macros, add wavetable size to sysdef, separate wavetable tab
This commit is contained in:
LTVA1
parent
2e321b66c2
commit
2fb518231a
9 changed files with 638 additions and 289 deletions
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@ -265,6 +265,7 @@ bool DivInstrumentSID3::operator==(const DivInstrumentSID3& other) {
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_C(sync_source) &&
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_C(specialWaveOn) &&
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_C(oneBitNoise) &&
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_C(separateNoisePitch) &&
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_C(special_wave) &&
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_C(filt[0]) &&
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_C(filt[1]) &&
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@ -870,6 +870,7 @@ struct DivInstrumentSID3
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unsigned char phase_mod_source, ring_mod_source, sync_source;
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bool specialWaveOn;
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bool oneBitNoise;
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bool separateNoisePitch;
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unsigned char special_wave;
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struct Filter
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@ -914,6 +915,7 @@ struct DivInstrumentSID3
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sync_source(0),
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specialWaveOn(false),
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oneBitNoise(false),
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separateNoisePitch(false),
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special_wave(0)
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{
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filt[0].mode = 16 | 32; //default settings so filter just works, connect to input and channel output
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@ -142,6 +142,13 @@ void DivPlatformSID3::updateFreq(int channel)
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rWrite(SID3_REGISTER_FREQ_LOW + channel*SID3_REGISTERS_PER_CHANNEL,chan[channel].freq & 0xff);
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}
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void DivPlatformSID3::updateNoiseFreq(int channel)
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{
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rWrite(SID3_REGISTER_NOISE_FREQ_HIGH + channel*SID3_REGISTERS_PER_CHANNEL,(chan[channel].noiseFreq >> 16) & 0xff);
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rWrite(SID3_REGISTER_NOISE_FREQ_MID + channel*SID3_REGISTERS_PER_CHANNEL,(chan[channel].noiseFreq >> 8) & 0xff);
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rWrite(SID3_REGISTER_NOISE_FREQ_LOW + channel*SID3_REGISTERS_PER_CHANNEL,chan[channel].noiseFreq & 0xff);
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}
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void DivPlatformSID3::updateDuty(int channel)
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{
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rWrite(SID3_REGISTER_PW_HIGH + channel*SID3_REGISTERS_PER_CHANNEL,(chan[channel].duty >> 8) & 0xff);
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@ -170,6 +177,8 @@ void DivPlatformSID3::tick(bool sysTick)
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chan[i].std.next();
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bool panChanged = false;
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bool flagsChanged = false;
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bool envChanged = false;
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if (chan[i].std.vol.had)
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{
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@ -203,6 +212,22 @@ void DivPlatformSID3::tick(bool sysTick)
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chan[i].duty&=65535;
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updateDuty(i);
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}
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if (chan[i].std.wave.had) {
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chan[i].wave = chan[i].std.wave.val & 0xff;
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rWrite(SID3_REGISTER_WAVEFORM + i * SID3_REGISTERS_PER_CHANNEL, chan[i].wave);
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}
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if (chan[i].std.alg.had) { //special wave
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chan[i].special_wave = chan[i].std.alg.val & 0xff;
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rWrite(SID3_REGISTER_SPECIAL_WAVE + i * SID3_REGISTERS_PER_CHANNEL, chan[i].special_wave);
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}
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if (chan[i].std.op[3].am.had) { //noise arpeggio
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chan[i].handleArpNoise(0);
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chan[i].noiseFreqChanged = true;
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}
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if (chan[i].std.op[0].ar.had) { //noise pitch
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chan[i].handlePitchNoise();
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chan[i].noiseFreqChanged = true;
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}
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if (chan[i].std.panL.had) {
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panChanged = true;
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chan[i].panLeft = chan[i].std.panL.val & 0xff;
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@ -211,21 +236,89 @@ void DivPlatformSID3::tick(bool sysTick)
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panChanged = true;
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chan[i].panRight = chan[i].std.panR.val & 0xff;
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}
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if (chan[i].std.op[0].am.had) { //key on/off
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chan[i].gate = chan[i].std.op[0].am.val & 1;
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flagsChanged = true;
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}
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if (chan[i].std.ex1.had) { //ring mod, hard sync, phase mod
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chan[i].phase = chan[i].std.ex1.val & 1;
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chan[i].sync = chan[i].std.ex1.val & 2;
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chan[i].ring = chan[i].std.ex1.val & 4;
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flagsChanged = true;
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}
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if (chan[i].std.ams.had) { //hard sync source
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chan[i].syncSrc = chan[i].std.ams.val & 0xff;
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rWrite(SID3_REGISTER_SYNC_SRC + i * SID3_REGISTERS_PER_CHANNEL, chan[i].syncSrc);
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}
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if (chan[i].std.fms.had) { //ring mod source
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chan[i].ringSrc = chan[i].std.fms.val & 0xff;
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rWrite(SID3_REGISTER_RING_MOD_SRC + i * SID3_REGISTERS_PER_CHANNEL, chan[i].ringSrc);
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}
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if (chan[i].std.fb.had) { //phase mod source
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chan[i].phaseSrc = chan[i].std.fb.val & 0xff;
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rWrite(SID3_REGISTER_PHASE_MOD_SRC + i * SID3_REGISTERS_PER_CHANNEL, chan[i].phaseSrc);
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}
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if (chan[i].std.phaseReset.had) {
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chan[i].phaseReset = chan[i].std.phaseReset.val & 1;
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if(chan[i].phaseReset)
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{
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updateFlags(i, chan[i].gate);
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flagsChanged = true;
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}
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}
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if (chan[i].std.op[1].am.had) { //noise phase reset
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chan[i].phaseResetNoise = chan[i].std.op[1].am.val & 1;
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chan[i].phaseReset = false;
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if(chan[i].phaseResetNoise)
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{
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flagsChanged = true;
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}
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}
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if (chan[i].std.op[2].am.had) { //envelope reset
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chan[i].envReset = chan[i].std.op[2].am.val & 1;
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if(chan[i].envReset)
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{
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flagsChanged = true;
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}
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}
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if (chan[i].std.ex2.had) { //attack
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chan[i].attack = chan[i].std.ex2.val & 0xff;
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envChanged = true;
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}
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if (chan[i].std.ex3.had) { //decay
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chan[i].decay = chan[i].std.ex3.val & 0xff;
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envChanged = true;
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}
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if (chan[i].std.ex4.had) { //sustain
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chan[i].sustain = chan[i].std.ex4.val & 0xff;
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envChanged = true;
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}
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if (chan[i].std.ex5.had) { //sustain rate
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chan[i].sr = chan[i].std.ex5.val & 0xff;
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envChanged = true;
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}
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if (chan[i].std.ex6.had) { //release
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chan[i].release = chan[i].std.ex6.val & 0xff;
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envChanged = true;
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}
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if(panChanged)
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{
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updatePanning(i);
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}
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if(flagsChanged)
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{
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updateFlags(i, chan[i].gate);
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chan[i].phaseReset = false;
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chan[i].phaseResetNoise = false;
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chan[i].envReset = false;
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}
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if(envChanged)
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{
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updateEnvelope(i);
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}
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if (chan[i].freqChanged || chan[i].keyOn || chan[i].keyOff)
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{
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@ -265,6 +358,11 @@ void DivPlatformSID3::tick(bool sysTick)
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updateFreq(i);
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if(!chan[i].independentNoiseFreq)
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{
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chan[i].noiseFreqChanged = true;
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}
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//rWrite(i*7,chan[i].freq&0xff);
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//rWrite(i*7+1,chan[i].freq>>8);
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//rWrite(0x1e, (chan[0].noise_mode) | (chan[1].noise_mode << 2) | (chan[2].noise_mode << 4) | ((chan[0].freq >> 16) << 6) | ((chan[1].freq >> 16) << 7));
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@ -273,6 +371,25 @@ void DivPlatformSID3::tick(bool sysTick)
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if (chan[i].keyOff) chan[i].keyOff=false;
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chan[i].freqChanged=false;
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}
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if(chan[i].noiseFreqChanged)
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{
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if(chan[i].independentNoiseFreq)
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{
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chan[i].noiseFreq=parent->calcFreq(chan[i].baseFreq,chan[i].pitch,chan[i].noise_fixedArp?chan[i].noise_baseNoteOverride:chan[i].noise_arpOff,chan[i].noise_fixedArp,false,2,chan[i].noise_pitch2,chipClock,CHIP_FREQBASE * 64);
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if (chan[i].noiseFreq<0) chan[i].noiseFreq=0;
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if (chan[i].noiseFreq>0xffffff) chan[i].noiseFreq=0xffffff;
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}
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else
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{
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chan[i].noiseFreq = chan[i].freq;
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}
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updateNoiseFreq(i);
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chan[i].noiseFreqChanged = false;
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}
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}
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}
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@ -330,6 +447,8 @@ int DivPlatformSID3::dispatch(DivCommand c) {
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chan[c.chan].ringSrc = ins->sid3.ring_mod_source;
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chan[c.chan].syncSrc = ins->sid3.sync_source;
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chan[c.chan].independentNoiseFreq = ins->sid3.separateNoisePitch;
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for(int j = 0; j < SID3_NUM_FILTERS; j++)
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{
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if(ins->sid3.filt[j].init)
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@ -555,6 +674,8 @@ void DivPlatformSID3::reset() {
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}
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chan[i].panLeft = chan[i].panRight = 0xff;
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chan[i].freq = chan[i].noiseFreq = 0;
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updatePanning(i);
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}
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@ -31,11 +31,14 @@ class DivPlatformSID3: public DivDispatch {
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unsigned short duty;
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bool resetMask, resetFilter, resetDuty, gate, ring, sync, phase, oneBitNoise;
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bool phaseReset, envReset, phaseResetNoise;
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bool noiseFreqChanged;
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unsigned char vol;
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unsigned char noise_mode;
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unsigned char mix_mode;
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unsigned char ringSrc, syncSrc, phaseSrc;
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unsigned char panLeft, panRight;
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unsigned int noiseFreq;
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bool independentNoiseFreq;
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struct Filter
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{
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@ -57,6 +60,68 @@ class DivPlatformSID3: public DivDispatch {
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filter_matrix(0) {}
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} filt[SID3_NUM_FILTERS];
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int noise_baseNoteOverride;
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bool noise_fixedArp;
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int noise_arpOff;
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int noise_pitch2;
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bool noise_hasArp;
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bool noise_hasPitch;
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void handleArpNoise(int offset=0)
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{
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DivMacroStruct& m = this->std.op[3].am;
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if (m.had) {
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noise_hasArp=true;
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if (m.val<0) {
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if (!(m.val&0x40000000)) {
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noise_baseNoteOverride=(m.val|0x40000000)+offset;
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noise_fixedArp=true;
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} else {
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noise_arpOff=m.val;
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noise_fixedArp=false;
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}
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} else {
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if (m.val&0x40000000) {
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noise_baseNoteOverride=(m.val&(~0x40000000))+offset;
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noise_fixedArp=true;
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} else {
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noise_arpOff=m.val;
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noise_fixedArp=false;
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}
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}
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noiseFreqChanged=true;
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}
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else
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{
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noise_hasArp=false;
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}
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}
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void handlePitchNoise()
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{
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DivMacroStruct& m = this->std.op[0].ar;
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if (m.had) {
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noise_hasPitch=true;
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if (m.mode) {
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noise_pitch2+=m.val;
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CLAMP_VAR(noise_pitch2,-131071,131071);
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} else {
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noise_pitch2=m.val;
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}
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noiseFreqChanged=true;
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}
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else
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{
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noise_hasPitch=false;
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}
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}
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Channel():
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SharedChannel<signed short>(SID3_MAX_VOL),
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prevFreq(0x1ffff),
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@ -79,6 +144,7 @@ class DivPlatformSID3: public DivDispatch {
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phaseReset(false),
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envReset(false),
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phaseResetNoise(false),
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noiseFreqChanged(false),
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vol(SID3_MAX_VOL),
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noise_mode(0),
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mix_mode(0),
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@ -86,7 +152,9 @@ class DivPlatformSID3: public DivDispatch {
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syncSrc(0),
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phaseSrc(0),
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panLeft(0xff),
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panRight(0xff) {}
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panRight(0xff),
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noiseFreq(0),
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independentNoiseFreq(false) {}
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};
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Channel chan[SID3_NUM_CHANNELS];
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DivDispatchOscBuffer* oscBuf[SID3_NUM_CHANNELS];
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@ -111,6 +179,7 @@ class DivPlatformSID3: public DivDispatch {
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void updateFlags(int channel, bool gate);
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void updateFilter(int channel, int filter);
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void updateFreq(int channel);
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void updateNoiseFreq(int channel);
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void updateDuty(int channel);
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void updateEnvelope(int channel);
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void updatePanning(int channel);
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@ -2315,6 +2315,9 @@ SID3* sid3_create()
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{
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sid3->env_counter_to_exponential_output[i] = (exp(-2.0 + (double)i * 4.0 / (double)SID3_EXPONENTIAL_LUT_LENGTH) - min_val) * scale_factor;
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}
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sid3->env_counter_to_exponential_output[0] = 0; //just in case
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for(uint32_t i = 0; i < SID3_EXPONENTIAL_LUT_LENGTH; i++)
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{
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sid3->exponential_output_to_envelope_counter[(uint64_t)sid3->env_counter_to_exponential_output[i] * (uint64_t)SID3_EXPONENTIAL_LUT_LENGTH / (uint64_t)0xffff] = i << 8;
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@ -2362,6 +2365,8 @@ void sid3_reset(SID3* sid3)
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}
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//TODO: wavetable chan
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memset(&sid3->wave_chan, 0, sizeof(sid3_wavetable_chan));
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sid3->wave_chan.adsr.hold_zero = true;
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}
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void sid3_gate_bit(SID3* sid3, uint8_t gate, sid3_channel_adsr* adsr)
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@ -2885,8 +2890,10 @@ void sid3_clock(SID3* sid3)
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sid3_channel* ch = &sid3->chan[i];
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uint32_t prev_acc = ch->accumulator;
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uint32_t prev_noise_acc = ch->noise_accumulator;
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ch->accumulator += ch->frequency;
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ch->noise_accumulator += ch->noise_frequency;
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ch->sync_bit = 0;
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@ -2897,22 +2904,38 @@ void sid3_clock(SID3* sid3)
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if(ch->flags & SID3_CHAN_ENABLE_HARD_SYNC)
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{
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if(sid3->chan[ch->hard_sync_src].sync_bit)
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if(ch->hard_sync_src == SID3_NUM_CHANNELS - 1) //wave chan
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{
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ch->accumulator = 0;
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if(sid3->wave_chan.sync_bit)
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{
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ch->accumulator = 0;
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ch->noise_accumulator = 0;
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ch->lfsr = 0x1;
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}
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}
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else
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{
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if(sid3->chan[ch->hard_sync_src].sync_bit)
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{
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ch->accumulator = 0;
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ch->noise_accumulator = 0;
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ch->lfsr = 0x1;
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}
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}
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}
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uint32_t acc_state = ch->accumulator;
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uint32_t noise_acc_state = ch->noise_accumulator;
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if(ch->flags & SID3_CHAN_ENABLE_PHASE_MOD)
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{
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ch->accumulator += ch->phase_mod_source == SID3_NUM_CHANNELS - 1 ? ((uint64_t)sid3->wave_channel_output << 18) : ((uint64_t)sid3->channel_output[ch->phase_mod_source] << 18);
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ch->noise_accumulator += ch->phase_mod_source == SID3_NUM_CHANNELS - 1 ? ((uint64_t)sid3->wave_channel_output << 18) : ((uint64_t)sid3->channel_output[ch->phase_mod_source] << 18);
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}
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ch->accumulator &= SID3_ACC_MASK;
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if((prev_acc & ((uint32_t)1 << (SID3_ACC_BITS - 6))) != (ch->accumulator & ((uint32_t)1 << (SID3_ACC_BITS - 6))))
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if((prev_noise_acc & ((uint32_t)1 << (SID3_ACC_BITS - 6))) != (ch->noise_accumulator & ((uint32_t)1 << (SID3_ACC_BITS - 6))))
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{
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sid3_clock_lfsr(ch);
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}
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@ -2920,6 +2943,7 @@ void sid3_clock(SID3* sid3)
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int32_t waveform = sid3_get_waveform(sid3, ch);
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ch->accumulator = acc_state & SID3_ACC_MASK;
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ch->noise_accumulator = noise_acc_state & SID3_ACC_MASK;
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sid3->channel_signals_before_ADSR[i] = waveform;
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@ -2985,6 +3009,7 @@ void sid3_write(SID3* sid3, uint16_t address, uint8_t data)
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sid3->chan[channel].adsr.envelope_counter = 0;
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sid3->chan[channel].adsr.state = ATTACK;
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sid3->chan[channel].adsr.envelope_speed = envspd_a(sid3->chan[channel].adsr.a);
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sid3->chan[channel].adsr.hold_zero = false;
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}
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if(sid3->chan[channel].flags & SID3_CHAN_PHASE_RESET)
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|
|
@ -3381,6 +3406,33 @@ void sid3_write(SID3* sid3, uint16_t address, uint8_t data)
|
|||
}
|
||||
break;
|
||||
}
|
||||
case SID3_REGISTER_NOISE_FREQ_HIGH:
|
||||
{
|
||||
if(channel != SID3_NUM_CHANNELS - 1)
|
||||
{
|
||||
sid3->chan[channel].noise_frequency &= 0x00ffff;
|
||||
sid3->chan[channel].noise_frequency |= data << 16;
|
||||
}
|
||||
break;
|
||||
}
|
||||
case SID3_REGISTER_NOISE_FREQ_MID:
|
||||
{
|
||||
if(channel != SID3_NUM_CHANNELS - 1)
|
||||
{
|
||||
sid3->chan[channel].noise_frequency &= 0xff00ff;
|
||||
sid3->chan[channel].noise_frequency |= data << 8;
|
||||
}
|
||||
break;
|
||||
}
|
||||
case SID3_REGISTER_NOISE_FREQ_LOW:
|
||||
{
|
||||
if(channel != SID3_NUM_CHANNELS - 1)
|
||||
{
|
||||
sid3->chan[channel].noise_frequency &= 0xffff00;
|
||||
sid3->chan[channel].noise_frequency |= data;
|
||||
}
|
||||
break;
|
||||
}
|
||||
default: break;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -112,8 +112,18 @@ enum Registers
|
|||
|
||||
SID3_REGISTER_AFTER_FILT_1ST_REG = SID3_REGISTER_FILT_BASE + SID3_REGISTERS_PER_FILTER * SID3_NUM_FILTERS,
|
||||
SID3_REGISTER_PHASE_MOD_SRC = SID3_REGISTER_AFTER_FILT_1ST_REG,
|
||||
|
||||
SID3_REGISTER_PAN_LEFT = SID3_REGISTER_AFTER_FILT_1ST_REG + 1,
|
||||
SID3_REGISTER_PAN_RIGHT = SID3_REGISTER_AFTER_FILT_1ST_REG + 2,
|
||||
|
||||
SID3_REGISTER_NOISE_FREQ_HIGH = SID3_REGISTER_AFTER_FILT_1ST_REG + 3,
|
||||
SID3_REGISTER_NOISE_FREQ_MID = SID3_REGISTER_AFTER_FILT_1ST_REG + 4,
|
||||
SID3_REGISTER_NOISE_FREQ_LOW = SID3_REGISTER_AFTER_FILT_1ST_REG + 5,
|
||||
|
||||
SID3_REGISTER_NOISE_LFSR_HIGHEST = SID3_REGISTER_AFTER_FILT_1ST_REG + 6,
|
||||
SID3_REGISTER_NOISE_LFSR_HIGH = SID3_REGISTER_AFTER_FILT_1ST_REG + 7,
|
||||
SID3_REGISTER_NOISE_LFSR_MID = SID3_REGISTER_AFTER_FILT_1ST_REG + 8,
|
||||
SID3_REGISTER_NOISE_LFSR_LOW = SID3_REGISTER_AFTER_FILT_1ST_REG + 9,
|
||||
};
|
||||
|
||||
typedef struct
|
||||
|
|
|
|||
|
|
@ -2160,7 +2160,7 @@ void DivEngine::registerSystems() {
|
|||
);
|
||||
|
||||
sysDefs[DIV_SYSTEM_SID3]=new DivSysDef(
|
||||
_("SID3"), NULL, 0xf5, 0, 7, false, true, 0, false, 0, 0, 0,
|
||||
_("SID3"), NULL, 0xf5, 0, 7, false, true, 0, false, (1U << DIV_SAMPLE_DEPTH_8BIT) | (1U << DIV_SAMPLE_DEPTH_16BIT), 256, 256,
|
||||
_("a fantasy sound chip created by LTVA. it is a big rework of SID chip with probably too much features added on top."),
|
||||
{_("Channel 1"), _("Channel 2"), _("Channel 3"), _("Channel 4"), _("Channel 5"), _("Channel 6"), _("Sample")},
|
||||
{"CH1", "CH2", "CH3", "CH4", "CH5", "CH6", "PCM"},
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue