VRC6: acquireDirect()
to-do: check for regressions? I need to sleep
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tildearrow
parent
0efe232ae8
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229003c597
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@ -8,15 +8,27 @@
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#include "vrcvi.hpp"
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void vrcvi_core::tick()
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int vrcvi_core::predict() {
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const int p0=m_pulse[0].predict();
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const int p1=m_pulse[1].predict();
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const int s=m_sawtooth.predict();
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int ret=p0;
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if (p1<ret) ret=p1;
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if (s<ret) ret=s;
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if (ret<1) ret=1;
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return ret;
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}
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void vrcvi_core::tick(int cycles)
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{
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m_out = 0;
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if (!m_control.m_halt) // Halt flag
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{
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// tick per each clock
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m_out += m_pulse[0].get_output(); // add 4 bit pulse output
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m_out += m_pulse[1].get_output();
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m_out += m_sawtooth.get_output(); // add 5 bit sawtooth output
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m_out += m_pulse[0].get_output(cycles); // add 4 bit pulse output
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m_out += m_pulse[1].get_output(cycles);
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m_out += m_sawtooth.get_output(cycles); // add 5 bit sawtooth output
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}
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}
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@ -30,7 +42,18 @@ void vrcvi_core::reset()
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m_out = 0;
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}
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bool vrcvi_core::alu_t::tick()
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int vrcvi_core::alu_t::predict() {
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if (!m_divider.m_enable) return 65535;
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if (m_host.m_control.m_shift&2) {
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return bitfield(m_counter, 8, 4);
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} else if (m_host.m_control.m_shift&1) {
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return bitfield(m_counter, 4, 8);
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}
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return m_counter&0xfff;
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}
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bool vrcvi_core::alu_t::tick(int cycles)
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{
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if (m_divider.m_enable)
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{
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@ -38,8 +61,8 @@ bool vrcvi_core::alu_t::tick()
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// post decrement
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if (m_host.m_control.m_shift&2)
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{
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m_counter = (m_counter & 0x0ff) | (bitfield(bitfield(m_counter, 8, 4) - 1, 0, 4) << 8);
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m_counter = (m_counter & 0xf00) | (bitfield(bitfield(m_counter, 0, 8) - 1, 0, 8) << 0);
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m_counter = (m_counter & 0x0ff) | (bitfield(bitfield(m_counter, 8, 4) - cycles, 0, 4) << 8);
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m_counter = (m_counter & 0xf00) | (bitfield(bitfield(m_counter, 0, 8) - cycles, 0, 8) << 0);
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if (bitfield(temp, 8, 4) == 0)
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{
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@ -49,8 +72,8 @@ bool vrcvi_core::alu_t::tick()
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}
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else if (m_host.m_control.m_shift&1)
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{
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m_counter = (m_counter & 0x00f) | (bitfield(bitfield(m_counter, 4, 8) - 1, 0, 8) << 4);
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m_counter = (m_counter & 0xff0) | (bitfield(bitfield(m_counter, 0, 4) - 1, 0, 4) << 0);
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m_counter = (m_counter & 0x00f) | (bitfield(bitfield(m_counter, 4, 8) - cycles, 0, 8) << 4);
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m_counter = (m_counter & 0xff0) | (bitfield(bitfield(m_counter, 0, 4) - cycles, 0, 4) << 0);
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if (bitfield(temp, 4, 8) == 0)
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{
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@ -60,7 +83,7 @@ bool vrcvi_core::alu_t::tick()
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}
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else
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{
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m_counter = (m_counter-1)&0xfff; //bitfield(bitfield(m_counter, 0, 12) - 1, 0, 12);
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m_counter = (m_counter-cycles)&0xfff; //bitfield(bitfield(m_counter, 0, 12) - 1, 0, 12);
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if (!(temp&0xfff)) {
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m_counter = m_divider.m_divider;
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return true;
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@ -72,14 +95,14 @@ bool vrcvi_core::alu_t::tick()
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return false;
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}
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bool vrcvi_core::pulse_t::tick()
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bool vrcvi_core::pulse_t::tick(int cycles)
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{
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if (!m_divider.m_enable)
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{
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return false;
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}
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if (vrcvi_core::alu_t::tick())
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if (vrcvi_core::alu_t::tick(cycles))
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{
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m_cycle = (m_cycle+1)&15;
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}
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@ -87,14 +110,14 @@ bool vrcvi_core::pulse_t::tick()
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return m_control.m_mode ? true : ((m_cycle > m_control.m_duty) ? true : false);
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}
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bool vrcvi_core::sawtooth_t::tick()
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bool vrcvi_core::sawtooth_t::tick(int cycles)
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{
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if (!m_divider.m_enable)
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{
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return false;
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}
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if (vrcvi_core::alu_t::tick())
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if (vrcvi_core::alu_t::tick(cycles))
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{
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if ((m_cycle++)&1)
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{ // Even step only
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@ -109,23 +132,24 @@ bool vrcvi_core::sawtooth_t::tick()
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return (m_accum != 0);
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}
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s8 vrcvi_core::pulse_t::get_output()
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s8 vrcvi_core::pulse_t::get_output(int cycles)
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{
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// add 4 bit pulse output
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m_out = tick() ? m_control.m_volume : 0;
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m_out = tick(cycles) ? m_control.m_volume : 0;
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return m_out;
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}
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s8 vrcvi_core::sawtooth_t::get_output()
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s8 vrcvi_core::sawtooth_t::get_output(int cycles)
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{
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// add 5 bit sawtooth output
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m_out = tick() ? ((m_accum>>3)&31) : 0;
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m_out = tick(cycles) ? ((m_accum>>3)&31) : 0;
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return m_out;
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}
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void vrcvi_core::alu_t::reset()
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{
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m_divider.reset();
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m_divider.m_divider = 1023;
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m_counter = 0;
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m_cycle = 0;
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m_out = 0;
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@ -135,6 +159,7 @@ void vrcvi_core::pulse_t::reset()
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{
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vrcvi_core::alu_t::reset();
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m_control.reset();
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m_divider.m_divider = 1023;
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}
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void vrcvi_core::sawtooth_t::reset()
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@ -142,6 +167,7 @@ void vrcvi_core::sawtooth_t::reset()
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vrcvi_core::alu_t::reset();
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m_rate = 0;
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m_accum = 0;
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m_divider.m_divider = 1023;
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}
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bool vrcvi_core::timer_t::tick()
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@ -47,7 +47,7 @@ class vrcvi_core : public vgsound_emu_core
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void reset()
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{
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m_divider = 0;
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m_divider = 1023;
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m_enable = 0;
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}
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@ -75,9 +75,10 @@ class vrcvi_core : public vgsound_emu_core
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}
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virtual void reset();
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virtual bool tick();
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virtual bool tick(int cycles);
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virtual int predict();
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virtual s8 get_output()
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virtual s8 get_output(int cycles)
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{
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m_out = 0;
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return 0;
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@ -155,8 +156,8 @@ class vrcvi_core : public vgsound_emu_core
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}
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virtual void reset() override;
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virtual bool tick() override;
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virtual s8 get_output() override;
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virtual bool tick(int cycles) override;
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virtual s8 get_output(int cycles) override;
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// getters
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pulse_control_t &control() { return m_control; }
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@ -177,8 +178,8 @@ class vrcvi_core : public vgsound_emu_core
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}
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virtual void reset() override;
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virtual bool tick() override;
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virtual s8 get_output() override;
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virtual bool tick(int cycles) override;
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virtual s8 get_output(int cycles) override;
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// accessors
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inline void clear_accum() { m_accum = 0; }
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@ -385,7 +386,8 @@ class vrcvi_core : public vgsound_emu_core
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// internal state
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void reset();
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void tick();
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int predict();
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void tick(int cycles=1);
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// 6 bit output
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inline s8 out() { return m_out; }
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@ -46,16 +46,28 @@ const char** DivPlatformVRC6::getRegisterSheet() {
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return regCheatSheetVRC6;
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}
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void DivPlatformVRC6::acquire(short** buf, size_t len) {
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void DivPlatformVRC6::acquireDirect(blip_buffer_t** bb, size_t len) {
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for (int i=0; i<3; i++) {
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oscBuf[i]->begin(len);
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}
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for (size_t h=0; h<len; h++) {
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// running heuristic
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int advance=vrc6.predict();
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if ((int)(len-h)<advance) advance=len-h;
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for (int i=0; i<2; i++) {
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if (chan[i].pcm && chan[i].dacSample!=-1) {
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if (chan[i].dacRate<=0) continue;
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int remainTime=(rate-chan[i].dacPeriod+chan[i].dacRate-1)/chan[i].dacRate;
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if (remainTime<advance) advance=remainTime;
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if (remainTime<1) advance=1;
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}
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}
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// PCM part
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for (int i=0; i<2; i++) {
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if (chan[i].pcm && chan[i].dacSample!=-1) {
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chan[i].dacPeriod+=chan[i].dacRate;
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chan[i].dacPeriod+=chan[i].dacRate*advance;
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if (chan[i].dacPeriod>rate) {
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DivSample* s=parent->getSample(chan[i].dacSample);
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if (s->samples<=0 || chan[i].dacPos>=s->samples) {
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@ -81,11 +93,13 @@ void DivPlatformVRC6::acquire(short** buf, size_t len) {
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}
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// VRC6 part
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vrc6.tick();
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vrc6.tick(advance);
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h+=advance-1;
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int sample=vrc6.out()<<9; // scale to 16 bit
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if (sample>32767) sample=32767;
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if (sample<-32768) sample=-32768;
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buf[0][h]=sample;
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if (sample!=prevSample) {
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blip_add_delta(bb[0],h,sample-prevSample);
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prevSample=sample;
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}
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// Oscilloscope buffer part
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if (++writeOscBuf>=32) {
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@ -96,7 +110,7 @@ void DivPlatformVRC6::acquire(short** buf, size_t len) {
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oscBuf[2]->putSample(h,vrc6.sawtooth_out()<<10);
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}
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// Command part
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// Command part (what the heck why at the END?!)
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while (!writes.empty()) {
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QueuedWrite w=writes.front();
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switch (w.addr&0xf000) {
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@ -523,6 +537,7 @@ void DivPlatformVRC6::reset() {
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}
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sampleBank=0;
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prevSample=0;
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vrc6.reset();
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// Initialize control register
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@ -537,6 +552,10 @@ bool DivPlatformVRC6::keyOffAffectsArp(int ch) {
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return true;
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}
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bool DivPlatformVRC6::hasAcquireDirect() {
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return true;
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}
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void DivPlatformVRC6::setFlags(const DivConfig& flags) {
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int clockSel=flags.getInt("clockSel",0);
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if (clockSel==2) { // Dendy
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@ -57,13 +57,14 @@ class DivPlatformVRC6: public DivDispatch, public vrcvi_intf {
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unsigned char sampleBank;
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unsigned char writeOscBuf;
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vrcvi_core vrc6;
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int prevSample;
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unsigned char regPool[13];
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friend void putDispatchChip(void*,int);
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friend void putDispatchChan(void*,int,int);
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public:
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void acquire(short** buf, size_t len);
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void acquireDirect(blip_buffer_t** bb, size_t len);
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int dispatch(DivCommand c);
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void* getChanState(int chan);
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DivMacroInt* getChanMacroInt(int ch);
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@ -76,6 +77,7 @@ class DivPlatformVRC6: public DivDispatch, public vrcvi_intf {
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void tick(bool sysTick=true);
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void muteChannel(int ch, bool mute);
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bool keyOffAffectsArp(int ch);
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bool hasAcquireDirect();
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void setFlags(const DivConfig& flags);
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void notifyInsDeletion(void* ins);
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void poke(unsigned int addr, unsigned short val);
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