Some fleshing out YMF278B
Add OpenMSX YMF278B core option, Expand RAM size option
This commit is contained in:
cam900
parent
a8ec76699b
commit
221fa5aa42
11 changed files with 275 additions and 104 deletions
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@ -29,6 +29,12 @@
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#define KVSL(x,y) ((chan[x].state.op[orderedOpsL1[ops==4][y]].kvs==2 && isOutputL[ops==4][chan[x].state.alg][y]) || chan[x].state.op[orderedOpsL1[ops==4][y]].kvs==1)
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#define CHIP_FREQBASE chipFreqBase
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#define PCM_FREQBASE (402653184)
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#define NOTE_PCM(x) parent->calcBaseFreq(chipClock,PCM_FREQBASE,x,false)
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#define PCM_CHECK(ch) ((chipType==4) && (ch>=pcmChanOffs))
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#define PCM_REG(ch) (ch-pcmChanOffs)
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// N = invalid
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#define N 255
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@ -176,36 +182,42 @@ const int orderedOpsL[4]={
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#define PCM_ADDR_MIX_PCM 0x2f9
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void DivPlatformOPL::acquire_nuked(short** buf, size_t len) {
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thread_local short o[4];
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thread_local int os[4];
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thread_local short o[8];
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thread_local int os[6];
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thread_local ymfm::ymfm_output<2> aOut;
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for (size_t h=0; h<len; h++) {
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os[0]=0; os[1]=0; os[2]=0; os[3]=0;
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os[0]=0; os[1]=0; os[2]=0; os[3]=0; os[4]=0; os[5]=0;
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short pcmBuf[24]={0};
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if (!writes.empty() && --delay<0) {
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delay=1;
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QueuedWrite& w=writes.front();
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switch (w.addr) {
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case 8:
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if (adpcmChan>=0) {
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adpcmB->write(w.addr-7,(w.val&15)|0x80);
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OPL3_WriteReg(&fm,w.addr,w.val&0xc0);
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} else {
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if (w.addr>=0x200) {
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pcm.writeReg(w.addr&0xff,w.val);
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regPool[0x200|(w.addr&0xff)]=w.val;
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} else {
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switch (w.addr) {
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case 8:
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if (adpcmChan>=0) {
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adpcmB->write(w.addr-7,(w.val&15)|0x80);
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OPL3_WriteReg(&fm,w.addr,w.val&0xc0);
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} else {
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OPL3_WriteReg(&fm,w.addr,w.val);
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}
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break;
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case 7: case 9: case 10: case 11: case 12: case 13: case 14: case 15: case 16: case 17: case 18: case 21: case 22: case 23:
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if (adpcmChan>=0) {
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adpcmB->write(w.addr-7,w.val);
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} else {
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OPL3_WriteReg(&fm,w.addr,w.val);
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}
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break;
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default:
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OPL3_WriteReg(&fm,w.addr,w.val);
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}
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break;
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case 7: case 9: case 10: case 11: case 12: case 13: case 14: case 15: case 16: case 17: case 18: case 21: case 22: case 23:
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if (adpcmChan>=0) {
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adpcmB->write(w.addr-7,w.val);
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} else {
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OPL3_WriteReg(&fm,w.addr,w.val);
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}
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break;
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default:
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OPL3_WriteReg(&fm,w.addr,w.val);
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break;
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break;
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}
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regPool[w.addr&511]=w.val;
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}
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regPool[w.addr&511]=w.val;
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writes.pop();
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}
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@ -214,10 +226,20 @@ void DivPlatformOPL::acquire_nuked(short** buf, size_t len) {
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} else {
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OPL3_Generate4Ch(&fm,o);
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}
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os[0]+=o[0];
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os[1]+=o[1];
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os[2]+=o[2];
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os[3]+=o[3];
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if (chipType==4) {
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pcm.generateMix(o[0],o[1],o[4],o[5],o[6],o[7],pcmBuf);
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os[0]+=o[4];
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os[1]+=o[5];
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os[2]+=o[2];
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os[3]+=o[3];
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os[4]+=o[6];
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os[5]+=o[7];
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} else {
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os[0]+=o[0];
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os[1]+=o[1];
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os[2]+=o[2];
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os[3]+=o[3];
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}
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if (adpcmChan>=0) {
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adpcmB->clock();
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@ -290,6 +312,12 @@ void DivPlatformOPL::acquire_nuked(short** buf, size_t len) {
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if (os[3]<-32768) os[3]=-32768;
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if (os[3]>32767) os[3]=32767;
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if (os[4]<-32768) os[4]=-32768;
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if (os[4]>32767) os[4]=32767;
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if (os[5]<-32768) os[5]=-32768;
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if (os[5]>32767) os[5]=32767;
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buf[0][h]=os[0];
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if (totalOutputs>1) {
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buf[1][h]=os[1];
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@ -301,9 +329,8 @@ void DivPlatformOPL::acquire_nuked(short** buf, size_t len) {
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buf[3][h]=os[3];
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}
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if (totalOutputs==6) {
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// placeholder for OPL4
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buf[4][h]=0;
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buf[5][h]=0;
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buf[4][h]=os[4];
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buf[5][h]=os[5];
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}
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}
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}
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@ -947,22 +974,44 @@ double DivPlatformOPL::NOTE_ADPCMB(int note) {
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return 0;
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}
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double DivPlatformOPL::NOTE_OPL4(int ch, int note) { // TODO
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if (pcmChanOffs<0) return 0;
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if (chan[ch].sample>=0 && chan[ch].sample<parent->song.sampleLen) {
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double off=65535.0*(double)(parent->getSample(chan[ch].sample)->centerRate)/8363.0;
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return parent->calcBaseFreq((double)chipClock/768,off,note,false);
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}
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return 0;
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}
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void DivPlatformOPL::tick(bool sysTick) {
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for (int i=0; i<totalChans; i++) {
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if (i>=pcmChanOffs) { // OPL4 PCM
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if (PCM_CHECK(i)) { // OPL4 PCM
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chan[i].std.next();
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if (chan[i].std.vol.had) {
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chan[i].outVol=VOL_SCALE_LOG((chan[i].vol&0x7f),(0x7f*chan[i].std.vol.val)/chan[i].macroVolMul,0x7f);
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immWrite(PCM_ADDR_TL+(i-pcmChanOffs),((0x7f-chan[i].outVol)<<1)|(chan[i].levelDirect?1:0));
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immWrite(PCM_ADDR_TL+(PCM_REG(i)),((0x7f-chan[i].outVol)<<1)|(chan[i].levelDirect?1:0));
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}
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if (NEW_ARP_STRAT) {
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chan[i].handleArp();
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} else if (chan[i].std.arp.had) {
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if (!chan[i].inPorta) {
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chan[i].baseFreq=NOTE_PCM(parent->calcArp(chan[i].note,chan[i].std.arp.val));
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}
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chan[i].freqChanged=true;
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}
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if (chan[i].std.pitch.had) {
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if (chan[i].std.pitch.mode) {
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chan[i].pitch2+=chan[i].std.pitch.val;
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CLAMP_VAR(chan[i].pitch2,-131071,131071);
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} else {
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chan[i].pitch2=chan[i].std.pitch.val;
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}
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chan[i].freqChanged=true;
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}
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if (chan[i].std.phaseReset.had) {
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if (chan[i].std.phaseReset.val==1 && chan[i].active) {
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chan[i].keyOn=true;
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}
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}
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if (chan[i].std.panL.had) { // panning
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chan[i].pan=chan[i].std.panL.val&0xf;
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chan[i].freqChanged=true;
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chan[i].writeCtrl=true;
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}
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if (chan[i].freqChanged || chan[i].keyOn || chan[i].keyOff) {
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@ -1013,11 +1062,12 @@ void DivPlatformOPL::tick(bool sysTick) {
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waveNum=MIN(waveNum,0x7f)|0x180;
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}
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if (chan[i].keyOn) {
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rWrite(PCM_ADDR_KEY_DAMP_LFORST_CH_PAN+(i-pcmChanOffs),ctrl&~0x80); // force keyoff first
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rWrite(PCM_ADDR_WAVE_H_FN_L+(i-pcmChanOffs),((chan[i].freqL&0x7f)<<1)|((waveNum>>8)&1));
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rWrite(PCM_ADDR_WAVE_L+(i-pcmChanOffs),waveNum&0xff);
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rWrite(PCM_ADDR_KEY_DAMP_LFORST_CH_PAN+PCM_REG(i),ctrl&~0x80); // force keyoff first
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rWrite(PCM_ADDR_WAVE_H_FN_L+PCM_REG(i),((chan[i].freqL&0x7f)<<1)|((waveNum>>8)&1));
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rWrite(PCM_ADDR_WAVE_L+PCM_REG(i),waveNum&0xff);
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if (!chan[i].std.vol.had) {
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chan[i].outVol=chan[i].vol;
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immWrite(PCM_ADDR_TL+(PCM_REG(i)),((0x7f-chan[i].outVol)<<1)|(chan[i].levelDirect?1:0));
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}
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chan[i].writeCtrl=true;
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chan[i].keyOn=false;
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@ -1027,12 +1077,12 @@ void DivPlatformOPL::tick(bool sysTick) {
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chan[i].keyOff=false;
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}
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if (chan[i].freqChanged) {
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rWrite(PCM_ADDR_WAVE_H_FN_L+(i-pcmChanOffs),((chan[i].freqL&0x7f)<<1)|((waveNum>>8)&1));
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rWrite(PCM_ADDR_FN_H_PR_OCT+(i-pcmChanOffs),((chan[i].freqH&0xf)<<4)|(chan[i].pseudoReverb?0x08:0x00)|((chan[i].freqL>>7)&0x7));
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rWrite(PCM_ADDR_WAVE_H_FN_L+PCM_REG(i),((chan[i].freqL&0x7f)<<1)|((waveNum>>8)&1));
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rWrite(PCM_ADDR_FN_H_PR_OCT+PCM_REG(i),((chan[i].freqH&0xf)<<4)|(chan[i].pseudoReverb?0x08:0x00)|((chan[i].freqL>>7)&0x7));
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chan[i].freqChanged=false;
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}
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if (chan[i].writeCtrl) {
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rWrite(PCM_ADDR_KEY_DAMP_LFORST_CH_PAN+(i-pcmChanOffs),ctrl);
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rWrite(PCM_ADDR_KEY_DAMP_LFORST_CH_PAN+PCM_REG(i),ctrl);
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chan[i].writeCtrl=false;
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}
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}
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@ -1309,7 +1359,7 @@ void DivPlatformOPL::tick(bool sysTick) {
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bool updateDrums=false;
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for (int i=0; i<totalChans; i++) {
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if (i>=pcmChanOffs) { // OPL4 PCM
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if (PCM_CHECK(i)) { // OPL4 PCM
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} else {
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if (chan[i].freqChanged) {
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@ -1426,7 +1476,7 @@ int DivPlatformOPL::toFreq(int freq) {
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void DivPlatformOPL::muteChannel(int ch, bool mute) {
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isMuted[ch]=mute;
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if (ch>=pcmChanOffs) {
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if (PCM_CHECK(ch)) {
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chan[ch].freqChanged=true;
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chan[ch].writeCtrl=true;
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return;
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@ -1479,6 +1529,9 @@ void DivPlatformOPL::muteChannel(int ch, bool mute) {
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}
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void DivPlatformOPL::commitState(int ch, DivInstrument* ins) {
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if (PCM_CHECK(ch)) {
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return;
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}
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if (chan[ch].insChanged) {
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if (ch>melodicChans && ins->type==DIV_INS_OPL_DRUMS) {
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for (int i=0; i<4; i++) {
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@ -1583,7 +1636,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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}
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switch (c.cmd) {
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case DIV_CMD_NOTE_ON: {
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if (c.chan>=pcmChanOffs) { // OPL4 PCM
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if (PCM_CHECK(c.chan)) { // OPL4 PCM
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DivInstrument* ins=parent->getIns(chan[c.chan].ins,DIV_INS_AMIGA);
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chan[c.chan].macroVolMul=ins->type==DIV_INS_AMIGA?64:127;
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if (c.value!=DIV_NOTE_NULL) {
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@ -1593,7 +1646,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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chan[c.chan].sampleNoteDelta=c.value-chan[c.chan].sampleNote;
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}
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if (c.value!=DIV_NOTE_NULL) {
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chan[c.chan].baseFreq=NOTE_FREQUENCY(c.value);
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chan[c.chan].baseFreq=NOTE_PCM(c.value);
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}
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if (chan[c.chan].sample<0 || chan[c.chan].sample>=parent->song.sampleLen) {
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chan[c.chan].sample=-1;
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@ -1733,7 +1786,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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chan[c.chan].keyOff=true;
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chan[c.chan].keyOn=false;
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chan[c.chan].active=false;
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if (c.chan>=pcmChanOffs) {
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if (PCM_CHECK(c.chan)) {
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chan[c.chan].sample=-1;
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chan[c.chan].macroInit(NULL);
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}
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@ -1757,8 +1810,8 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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if (!chan[c.chan].std.vol.has) {
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chan[c.chan].outVol=c.value;
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}
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if (c.chan>=pcmChanOffs) { // OPL4 PCM
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immWrite(PCM_ADDR_TL+(c.chan-pcmChanOffs),((0x7f-chan[c.chan].outVol)<<1)|(chan[c.chan].levelDirect?1:0));
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if (PCM_CHECK(c.chan)) { // OPL4 PCM
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immWrite(PCM_ADDR_TL+PCM_REG(c.chan),((0x7f-chan[c.chan].outVol)<<1)|(chan[c.chan].levelDirect?1:0));
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break;
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}
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if (c.chan==adpcmChan) { // ADPCM-B
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@ -1798,6 +1851,12 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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chan[c.chan].ins=c.value;
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break;
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case DIV_CMD_PANNING: {
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if (PCM_CHECK(c.chan)) {
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chan[c.chan].pan=8^MIN(parent->convertPanSplitToLinearLR(c.value,c.value2,15)+1,15);
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chan[c.chan].freqChanged=true;
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chan[c.chan].writeCtrl=true;
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break;
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}
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if (oplType!=3) break;
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if (c.chan==adpcmChan) break;
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chan[c.chan].pan&=~3;
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@ -1856,6 +1915,29 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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break;
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}
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case DIV_CMD_NOTE_PORTA: {
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if (PCM_CHECK(c.chan)) {
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int destFreq=NOTE_PCM(c.value2+chan[c.chan].sampleNoteDelta);
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bool return2=false;
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if (destFreq>chan[c.chan].baseFreq) {
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chan[c.chan].baseFreq+=c.value;
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if (chan[c.chan].baseFreq>=destFreq) {
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chan[c.chan].baseFreq=destFreq;
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return2=true;
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}
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} else {
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chan[c.chan].baseFreq-=c.value;
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if (chan[c.chan].baseFreq<=destFreq) {
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chan[c.chan].baseFreq=destFreq;
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return2=true;
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}
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}
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chan[c.chan].freqChanged=true;
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if (return2) {
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chan[c.chan].inPorta=false;
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return 2;
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}
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break;
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}
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int destFreq=(c.chan==adpcmChan)?(NOTE_ADPCMB(c.value2)):(NOTE_FREQUENCY(c.value2));
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int newFreq;
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bool return2=false;
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@ -1901,13 +1983,14 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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commitState(c.chan,ins);
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chan[c.chan].insChanged=false;
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}
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chan[c.chan].baseFreq=(c.chan==adpcmChan)?(NOTE_ADPCMB(c.value)):(NOTE_FREQUENCY(c.value));
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chan[c.chan].baseFreq=(PCM_CHECK(c.chan))?NOTE_PCM(c.value):
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(c.chan==adpcmChan)?(NOTE_ADPCMB(c.value)):(NOTE_FREQUENCY(c.value));
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chan[c.chan].note=c.value;
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chan[c.chan].freqChanged=true;
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break;
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}
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case DIV_CMD_FM_LFO: {
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if (c.chan>=pcmChanOffs) break;
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if (PCM_CHECK(c.chan)) break;
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if (c.chan==adpcmChan) break;
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if (c.value&2) {
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dvb=c.value&1;
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@ -1918,7 +2001,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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break;
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}
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case DIV_CMD_FM_FB: {
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if (c.chan>=pcmChanOffs) break;
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if (PCM_CHECK(c.chan)) break;
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if (c.chan==adpcmChan) break;
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chan[c.chan].state.fb=c.value&7;
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int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
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@ -1936,7 +2019,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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break;
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}
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case DIV_CMD_FM_MULT: {
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if (c.chan>=pcmChanOffs) break;
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if (PCM_CHECK(c.chan)) break;
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if (c.chan==adpcmChan) break;
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int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
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if (c.value>=ops) break;
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@ -1949,7 +2032,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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break;
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}
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case DIV_CMD_FM_TL: {
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if (c.chan>=pcmChanOffs) break;
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if (PCM_CHECK(c.chan)) break;
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if (c.chan==adpcmChan) break;
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int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
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if (c.value>=ops) break;
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|
@ -1970,7 +2053,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
|
|||
break;
|
||||
}
|
||||
case DIV_CMD_FM_AR: {
|
||||
if (c.chan>=pcmChanOffs) break;
|
||||
if (PCM_CHECK(c.chan)) break;
|
||||
if (c.chan==adpcmChan) break;
|
||||
int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
|
||||
if (c.value<0) {
|
||||
|
|
@ -1994,7 +2077,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
|
|||
break;
|
||||
}
|
||||
case DIV_CMD_FM_DR: {
|
||||
if (c.chan>=pcmChanOffs) break;
|
||||
if (PCM_CHECK(c.chan)) break;
|
||||
if (c.chan==adpcmChan) break;
|
||||
int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
|
||||
if (c.value<0) {
|
||||
|
|
@ -2018,7 +2101,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
|
|||
break;
|
||||
}
|
||||
case DIV_CMD_FM_SL: {
|
||||
if (c.chan>=pcmChanOffs) break;
|
||||
if (PCM_CHECK(c.chan)) break;
|
||||
if (c.chan==adpcmChan) break;
|
||||
int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
|
||||
if (c.value<0) {
|
||||
|
|
@ -2042,7 +2125,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
|
|||
break;
|
||||
}
|
||||
case DIV_CMD_FM_RR: {
|
||||
if (c.chan>=pcmChanOffs) break;
|
||||
if (PCM_CHECK(c.chan)) break;
|
||||
if (c.chan==adpcmChan) break;
|
||||
int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
|
||||
if (c.value<0) {
|
||||
|
|
@ -2066,7 +2149,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
|
|||
break;
|
||||
}
|
||||
case DIV_CMD_FM_AM: {
|
||||
if (c.chan>=pcmChanOffs) break;
|
||||
if (PCM_CHECK(c.chan)) break;
|
||||
if (c.chan==adpcmChan) break;
|
||||
int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
|
||||
if (c.value<0) {
|
||||
|
|
@ -2090,7 +2173,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
|
|||
break;
|
||||
}
|
||||
case DIV_CMD_FM_VIB: {
|
||||
if (c.chan>=pcmChanOffs) break;
|
||||
if (PCM_CHECK(c.chan)) break;
|
||||
if (c.chan==adpcmChan) break;
|
||||
int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
|
||||
if (c.value<0) {
|
||||
|
|
@ -2114,7 +2197,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
|
|||
break;
|
||||
}
|
||||
case DIV_CMD_FM_SUS: {
|
||||
if (c.chan>=pcmChanOffs) break;
|
||||
if (PCM_CHECK(c.chan)) break;
|
||||
if (c.chan==adpcmChan) break;
|
||||
int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
|
||||
if (c.value<0) {
|
||||
|
|
@ -2138,7 +2221,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
|
|||
break;
|
||||
}
|
||||
case DIV_CMD_FM_KSR: {
|
||||
if (c.chan>=pcmChanOffs) break;
|
||||
if (PCM_CHECK(c.chan)) break;
|
||||
if (c.chan==adpcmChan) break;
|
||||
int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
|
||||
if (c.value<0) {
|
||||
|
|
@ -2162,7 +2245,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
|
|||
break;
|
||||
}
|
||||
case DIV_CMD_FM_WS: {
|
||||
if (c.chan>=pcmChanOffs) break;
|
||||
if (PCM_CHECK(c.chan)) break;
|
||||
if (c.chan==adpcmChan) break;
|
||||
if (oplType<2) break;
|
||||
int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
|
||||
|
|
@ -2187,7 +2270,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
|
|||
break;
|
||||
}
|
||||
case DIV_CMD_FM_RS: {
|
||||
if (c.chan>=pcmChanOffs) break;
|
||||
if (PCM_CHECK(c.chan)) break;
|
||||
if (c.chan==adpcmChan) break;
|
||||
if (oplType<2) break;
|
||||
int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
|
||||
|
|
@ -2261,7 +2344,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
|
|||
chan[c.chan].std.restart(c.value);
|
||||
break;
|
||||
case DIV_CMD_GET_VOLMAX:
|
||||
if (c.chan>=pcmChanOffs) return 127;
|
||||
if (PCM_CHECK(c.chan)) return 127;
|
||||
if (c.chan==adpcmChan) return 255;
|
||||
if (pretendYMU) return 127;
|
||||
return 63;
|
||||
|
|
@ -2397,7 +2480,7 @@ DivDispatchOscBuffer* DivPlatformOPL::getOscBuffer(int ch) {
|
|||
}
|
||||
|
||||
int DivPlatformOPL::mapVelocity(int ch, float vel) {
|
||||
if (ch>=pcmChanOffs) return vel*127.0;
|
||||
if (PCM_CHECK(ch)) return vel*127.0;
|
||||
if (ch==adpcmChan) return vel*255.0;
|
||||
// -0.75dB per step
|
||||
// -6: 64: 8
|
||||
|
|
@ -2487,6 +2570,7 @@ void DivPlatformOPL::reset() {
|
|||
OPL3_Reset(&fm,rate);
|
||||
}
|
||||
}
|
||||
pcm.reset();
|
||||
|
||||
if (dumpWrites) {
|
||||
addWrite(0xffffffff,0);
|
||||
|
|
@ -2512,9 +2596,9 @@ void DivPlatformOPL::reset() {
|
|||
for (int i=0; i<totalChans; i++) {
|
||||
chan[i]=DivPlatformOPL::Channel();
|
||||
chan[i].std.setEngine(parent);
|
||||
chan[i].vol=(i>=pcmChanOffs)?0x7f:0x3f;
|
||||
chan[i].outVol=(i>=pcmChanOffs)?0x7f:0x3f;
|
||||
chan[i].pan=(i>=pcmChanOffs)?0:3;
|
||||
chan[i].vol=(PCM_CHECK(i))?0x7f:0x3f;
|
||||
chan[i].outVol=(PCM_CHECK(i))?0x7f:0x3f;
|
||||
chan[i].pan=(PCM_CHECK(i))?0:3;
|
||||
}
|
||||
|
||||
if (adpcmChan>=0) {
|
||||
|
|
@ -2791,16 +2875,22 @@ void DivPlatformOPL::setFlags(const DivConfig& flags) {
|
|||
break;
|
||||
}
|
||||
switch (flags.getInt("ramSize",0)) {
|
||||
case 0x01:
|
||||
case 0x01: // 2MB (512KB 512KB 512KB 512KB)
|
||||
ramSize=0x200000;
|
||||
break;
|
||||
case 0x02:
|
||||
case 0x02: // 1MB (512KB 512KB)
|
||||
ramSize=0x100000;
|
||||
break;
|
||||
case 0x03:
|
||||
case 0x03: // 640KB (512KB 128KB)
|
||||
ramSize=0xa0000;
|
||||
break;
|
||||
case 0x04: // 512KB
|
||||
ramSize=0x80000;
|
||||
break;
|
||||
case 0x04:
|
||||
case 0x05: // 256KB (128KB 128KB)
|
||||
ramSize=0x40000;
|
||||
break;
|
||||
case 0x06: // 128KB
|
||||
ramSize=0x20000;
|
||||
break;
|
||||
default:
|
||||
|
|
@ -2808,6 +2898,7 @@ void DivPlatformOPL::setFlags(const DivConfig& flags) {
|
|||
break;
|
||||
}
|
||||
CHECK_CUSTOM_CLOCK;
|
||||
pcm.setClockFrequency(chipClock);
|
||||
rate=chipClock/768;
|
||||
chipRateBase=chipClock/684;
|
||||
immWrite(0x202,(ramSize<=0x200000)?0x10:0x00);
|
||||
|
|
@ -3038,6 +3129,7 @@ int DivPlatformOPL::init(DivEngine* p, int channels, int sugRate, const DivConfi
|
|||
pcmMemLen=0;
|
||||
iface.pcmMem=pcmMem;
|
||||
iface.sampleBank=0;
|
||||
pcmMemory.memory=pcmMem;
|
||||
}
|
||||
|
||||
reset();
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue