Merge branch 'master' of https://github.com/tildearrow/furnace into ym2610b
This commit is contained in:
commit
1631af8f8e
21 changed files with 700 additions and 284 deletions
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@ -273,6 +273,7 @@ void DivPlatformLynx::forceIns() {
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chan[i].insChanged=true;
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chan[i].freqChanged=true;
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}
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WRITE_ATTEN(i,chan[i].pan);
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}
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}
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@ -75,6 +75,10 @@ const char* DivPlatformOPLL::getEffectName(unsigned char effect) {
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return NULL;
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}
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const unsigned char cycleMapOPLL[18]={
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8, 7, 6, 7, 8, 7, 8, 6, 0, 1, 2, 7, 8, 9, 3, 4, 5, 9
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};
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void DivPlatformOPLL::acquire_nuked(short* bufL, short* bufR, size_t start, size_t len) {
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static int o[2];
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static int os;
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@ -100,7 +104,10 @@ void DivPlatformOPLL::acquire_nuked(short* bufL, short* bufR, size_t start, size
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}
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OPLL_Clock(&fm,o);
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os+=(o[0]+o[1]);
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unsigned char nextOut=cycleMapOPLL[fm.cycles];
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if (!isMuted[nextOut]) {
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os+=(o[0]+o[1]);
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}
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}
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os*=50;
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if (os<-32768) os=-32768;
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@ -120,21 +127,9 @@ void DivPlatformOPLL::tick() {
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for (int i=0; i<9; i++) {
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chan[i].std.next();
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/*if (chan[i].std.hadVol) {
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chan[i].outVol=(chan[i].vol*MIN(127,chan[i].std.vol))/127;
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[i].state.alg][j]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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}
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}
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if (chan[i].std.hadVol) {
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chan[i].outVol=(chan[i].vol*MIN(15,chan[i].std.vol))/15;
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rWrite(0x30+i,(15-(chan[i].outVol*(15-chan[i].state.op[1].tl))/15)|(chan[i].state.opllPreset<<4));
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}
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if (chan[i].std.hadArp) {
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@ -153,95 +148,86 @@ void DivPlatformOPLL::tick() {
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}
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}
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if (chan[i].std.hadAlg) {
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chan[i].state.alg=chan[i].std.alg;
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rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
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if (!parent->song.algMacroBehavior) for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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if (chan[i].state.opllPreset==0) {
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if (chan[i].std.hadAlg) { // SUS
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chan[i].state.alg=chan[i].std.alg;
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chan[i].freqChanged=true;
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}
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if (chan[i].std.hadFb) {
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chan[i].state.fb=chan[i].std.fb;
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rWrite(0x03,(chan[i].state.op[0].ksl<<6)|((chan[i].state.fms&1)<<4)|((chan[i].state.ams&1)<<3)|chan[i].state.fb);
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}
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if (chan[i].std.hadFms) {
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chan[i].state.fms=chan[i].std.fms;
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rWrite(0x03,(chan[i].state.op[0].ksl<<6)|((chan[i].state.fms&1)<<4)|((chan[i].state.ams&1)<<3)|chan[i].state.fb);
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}
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if (chan[i].std.hadAms) {
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chan[i].state.ams=chan[i].std.ams;
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rWrite(0x03,(chan[i].state.op[0].ksl<<6)|((chan[i].state.fms&1)<<4)|((chan[i].state.ams&1)<<3)|chan[i].state.fb);
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}
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for (int j=0; j<2; j++) {
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[i].state.alg][j]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
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DivMacroInt::IntOp& m=chan[i].std.op[j];
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if (m.hadAm) {
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op.am=m.am;
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rWrite(0x00+j,(op.am<<7)|(op.vib<<6)|((op.ssgEnv&8)<<2)|(op.ksr<<4)|(op.mult));
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}
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if (m.hadAr) {
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op.ar=m.ar;
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rWrite(0x04+j,(op.ar<<4)|(op.dr));
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}
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if (m.hadDr) {
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op.dr=m.dr;
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rWrite(0x04+j,(op.ar<<4)|(op.dr));
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}
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if (m.hadMult) {
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op.mult=m.mult;
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rWrite(0x00+j,(op.am<<7)|(op.vib<<6)|((op.ssgEnv&8)<<2)|(op.ksr<<4)|(op.mult));
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}
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if (m.hadRr) {
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op.rr=m.rr;
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rWrite(0x06+j,(op.sl<<4)|(op.rr));
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}
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if (m.hadSl) {
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op.sl=m.sl;
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rWrite(0x06+j,(op.sl<<4)|(op.rr));
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}
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if (m.hadTl) {
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op.tl=((j==1)?15:63)-m.tl;
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if (j==1) {
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rWrite(0x30+i,(15-(chan[i].outVol*(15-chan[i].state.op[1].tl))/15)|(chan[i].state.opllPreset<<4));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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rWrite(0x02,(chan[i].state.op[1].ksl<<6)|(op.tl&63));
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}
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}
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if (m.hadEgt) {
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op.ssgEnv=(m.egt&1)?8:0;
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rWrite(0x00+j,(op.am<<7)|(op.vib<<6)|((op.ssgEnv&8)<<2)|(op.ksr<<4)|(op.mult));
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}
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if (m.hadKsl) {
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op.ksl=m.ksl;
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if (j==1) {
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rWrite(0x02,(op.ksl<<6)|(chan[i].state.op[0].tl&63));
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} else {
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rWrite(0x03,(chan[i].state.op[0].ksl<<6)|((chan[i].state.fms&1)<<4)|((chan[i].state.ams&1)<<3)|chan[i].state.fb);
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}
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}
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if (m.hadKsr) {
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op.ksr=m.ksr;
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rWrite(0x00+j,(op.am<<7)|(op.vib<<6)|((op.ssgEnv&8)<<2)|(op.ksr<<4)|(op.mult));
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}
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if (m.hadVib) {
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op.vib=m.vib;
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rWrite(0x00+j,(op.am<<7)|(op.vib<<6)|((op.ssgEnv&8)<<2)|(op.ksr<<4)|(op.mult));
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}
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}
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}
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if (chan[i].std.hadFb) {
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chan[i].state.fb=chan[i].std.fb;
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rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
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}
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if (chan[i].std.hadFms) {
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chan[i].state.fms=chan[i].std.fms;
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rWrite(chanOffs[i]+ADDR_LRAF,(isMuted[i]?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
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}
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if (chan[i].std.hadAms) {
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chan[i].state.ams=chan[i].std.ams;
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rWrite(chanOffs[i]+ADDR_LRAF,(isMuted[i]?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
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}
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for (int j=0; j<2; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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DivMacroInt::IntOp& m=chan[i].std.op[j];
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if (m.hadAm) {
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op.am=m.am;
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rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
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}
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if (m.hadAr) {
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op.ar=m.ar;
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rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
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}
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if (m.hadDr) {
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op.dr=m.dr;
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rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
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}
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if (m.hadMult) {
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op.mult=m.mult;
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rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
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}
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if (m.hadRr) {
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op.rr=m.rr;
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rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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if (m.hadSl) {
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op.sl=m.sl;
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rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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if (m.hadTl) {
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op.tl=127-m.tl;
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[i].state.alg][j]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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}
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}
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if (m.hadRs) {
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op.rs=m.rs;
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rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
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}
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if (m.hadDt) {
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op.dt=m.dt;
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rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
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}
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if (m.hadD2r) {
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op.d2r=m.d2r;
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rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
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}
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if (m.hadSsg) {
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op.ssgEnv=m.ssg;
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rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
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}
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}*/
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if (chan[i].keyOn || chan[i].keyOff) {
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if (chan[i].drums) {
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if (i>=6 && drums) {
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drumState&=~(0x10>>(chan[i].note%12));
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immWrite(0x0e,0x20|drumState);
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} else {
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@ -266,11 +252,11 @@ void DivPlatformOPLL::tick() {
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int freqt=toFreq(chan[i].freq);
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chan[i].freqH=freqt>>8;
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chan[i].freqL=freqt&0xff;
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if (!chan[i].drums) {
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if (i<6 || !drums) {
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immWrite(0x10+i,freqt&0xff);
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}
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}
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if (chan[i].keyOn && chan[i].drums) {
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if (chan[i].keyOn && i>=6 && drums) {
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//printf("%d\n",chan[i].note%12);
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drumState|=(0x10>>(chan[i].note%12));
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immWrite(0x0e,0x20|drumState);
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@ -372,21 +358,27 @@ int DivPlatformOPLL::dispatch(DivCommand c) {
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rWrite(0x05,(car.ar<<4)|(car.dr));
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rWrite(0x06,(mod.sl<<4)|(mod.rr));
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rWrite(0x07,(car.sl<<4)|(car.rr));
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lastCustomMemory=c.chan;
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}
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if (chan[c.chan].state.opllPreset==16) { // compatible drums mode
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chan[c.chan].drums=true;
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immWrite(0x16,0x20);
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immWrite(0x26,0x05);
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immWrite(0x16,0x20);
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immWrite(0x26,0x05);
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immWrite(0x17,0x50);
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immWrite(0x27,0x05);
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immWrite(0x17,0x50);
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immWrite(0x27,0x05);
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immWrite(0x18,0xC0);
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immWrite(0x28,0x01);
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if (c.chan>=6) {
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drums=true;
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immWrite(0x16,0x20);
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immWrite(0x26,0x05);
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immWrite(0x16,0x20);
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immWrite(0x26,0x05);
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immWrite(0x17,0x50);
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immWrite(0x27,0x05);
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immWrite(0x17,0x50);
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immWrite(0x27,0x05);
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immWrite(0x18,0xC0);
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immWrite(0x28,0x01);
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}
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} else {
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chan[c.chan].drums=false;
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if (c.chan>=6) {
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drums=false;
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immWrite(0x0e,0);
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}
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rWrite(0x30+c.chan,(15-(chan[c.chan].outVol*(15-chan[c.chan].state.op[1].tl))/15)|(chan[c.chan].state.opllPreset<<4));
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}
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}
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@ -397,7 +389,7 @@ int DivPlatformOPLL::dispatch(DivCommand c) {
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chan[c.chan].baseFreq=NOTE_FREQUENCY(c.value);
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chan[c.chan].note=c.value;
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if (chan[c.chan].drums) {
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if (c.chan>=6 && drums) {
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switch (chan[c.chan].note%12) {
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case 0: // kick
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drumVol[0]=(15-(chan[c.chan].outVol*(15-chan[c.chan].state.op[1].tl))/15);
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@ -444,7 +436,7 @@ int DivPlatformOPLL::dispatch(DivCommand c) {
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if (!chan[c.chan].std.hasVol) {
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chan[c.chan].outVol=c.value;
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}
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if (!chan[c.chan].drums) {
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if (c.chan<6 || !drums) {
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rWrite(0x30+c.chan,(15-(chan[c.chan].outVol*(15-chan[c.chan].state.op[1].tl))/15)|(chan[c.chan].state.opllPreset<<4));
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}
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break;
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@ -502,52 +494,56 @@ int DivPlatformOPLL::dispatch(DivCommand c) {
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chan[c.chan].freqChanged=true;
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break;
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}
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/*
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case DIV_CMD_FM_FB: {
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DivInstrumentFM::Operator& mod=chan[c.chan].state.op[0];
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//DivInstrumentFM::Operator& car=chan[c.chan].state.op[1];
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chan[c.chan].state.fb=c.value&7;
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rWrite(chanOffs[c.chan]+ADDR_FB_ALG,(chan[c.chan].state.alg&7)|(chan[c.chan].state.fb<<3));
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rWrite(0x03,(mod.ksl<<6)|((chan[c.chan].state.fms&1)<<4)|((chan[c.chan].state.ams&1)<<3)|chan[c.chan].state.fb);
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break;
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}
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case DIV_CMD_FM_MULT: {
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
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op.mult=c.value2&15;
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rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
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if (c.value==0) {
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DivInstrumentFM::Operator& mod=chan[c.chan].state.op[0];
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mod.mult=c.value2&15;
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rWrite(0x00,(mod.am<<7)|(mod.vib<<6)|((mod.ssgEnv&8)<<2)|(mod.ksr<<4)|(mod.mult));
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} else {
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DivInstrumentFM::Operator& car=chan[c.chan].state.op[1];
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car.mult=c.value2&15;
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rWrite(0x30+c.chan,(15-(chan[c.chan].outVol*(15-chan[c.chan].state.op[1].tl))/15)|(chan[c.chan].state.opllPreset<<4));
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}
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break;
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}
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case DIV_CMD_FM_TL: {
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
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op.tl=c.value2;
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if (isMuted[c.chan]) {
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rWrite(baseAddr+ADDR_TL,127);
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if (c.value==0) {
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DivInstrumentFM::Operator& mod=chan[c.chan].state.op[0];
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DivInstrumentFM::Operator& car=chan[c.chan].state.op[1];
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mod.tl=c.value2&63;
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rWrite(0x02,(car.ksl<<6)|(mod.tl&63));
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} else {
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if (isOutput[chan[c.chan].state.alg][c.value]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[c.chan].outVol&0x7f))/127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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DivInstrumentFM::Operator& car=chan[c.chan].state.op[1];
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car.tl=c.value2&15;
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rWrite(0x01,(car.am<<7)|(car.vib<<6)|((car.ssgEnv&8)<<2)|(car.ksr<<4)|(car.mult));
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}
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break;
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}
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case DIV_CMD_FM_AR: {
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DivInstrumentFM::Operator& mod=chan[c.chan].state.op[0];
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DivInstrumentFM::Operator& car=chan[c.chan].state.op[1];
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if (c.value<0) {
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for (int i=0; i<4; i++) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
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op.ar=c.value2&31;
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
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rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
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}
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mod.ar=c.value2&15;
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car.ar=c.value2&15;
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} else {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
||||
op.ar=c.value2&31;
|
||||
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
||||
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
||||
if (c.value==0) {
|
||||
mod.ar=c.value2&15;
|
||||
} else {
|
||||
car.ar=c.value2&15;
|
||||
}
|
||||
}
|
||||
|
||||
rWrite(0x04,(mod.ar<<4)|(mod.dr));
|
||||
rWrite(0x05,(car.ar<<4)|(car.dr));
|
||||
break;
|
||||
}
|
||||
*/
|
||||
case DIV_ALWAYS_SET_VOLUME:
|
||||
return 0;
|
||||
break;
|
||||
|
|
@ -569,7 +565,7 @@ int DivPlatformOPLL::dispatch(DivCommand c) {
|
|||
void DivPlatformOPLL::forceIns() {
|
||||
for (int i=0; i<9; i++) {
|
||||
// update custom preset
|
||||
if (chan[i].state.opllPreset==0) {
|
||||
if (chan[i].state.opllPreset==0 && i==lastCustomMemory) {
|
||||
DivInstrumentFM::Operator& mod=chan[i].state.op[0];
|
||||
DivInstrumentFM::Operator& car=chan[i].state.op[1];
|
||||
rWrite(0x00,(mod.am<<7)|(mod.vib<<6)|((mod.ssgEnv&8)<<2)|(mod.ksr<<4)|(mod.mult));
|
||||
|
|
@ -587,12 +583,33 @@ void DivPlatformOPLL::forceIns() {
|
|||
chan[i].freqChanged=true;
|
||||
}
|
||||
}
|
||||
if (drums) {
|
||||
immWrite(0x16,0x20);
|
||||
immWrite(0x26,0x05);
|
||||
immWrite(0x16,0x20);
|
||||
immWrite(0x26,0x05);
|
||||
immWrite(0x17,0x50);
|
||||
immWrite(0x27,0x05);
|
||||
immWrite(0x17,0x50);
|
||||
immWrite(0x27,0x05);
|
||||
immWrite(0x18,0xC0);
|
||||
immWrite(0x28,0x01);
|
||||
}
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::toggleRegisterDump(bool enable) {
|
||||
DivDispatch::toggleRegisterDump(enable);
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::setVRC7(bool vrc) {
|
||||
vrc7=vrc;
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::setProperDrums(bool pd) {
|
||||
properDrums=pd;
|
||||
}
|
||||
|
||||
|
||||
void* DivPlatformOPLL::getChanState(int ch) {
|
||||
return &chan[ch];
|
||||
}
|
||||
|
|
@ -608,7 +625,11 @@ int DivPlatformOPLL::getRegisterPoolSize() {
|
|||
void DivPlatformOPLL::reset() {
|
||||
while (!writes.empty()) writes.pop();
|
||||
memset(regPool,0,256);
|
||||
OPLL_Reset(&fm,opll_type_ym2413);
|
||||
if (vrc7) {
|
||||
OPLL_Reset(&fm,opll_type_ds1001);
|
||||
} else {
|
||||
OPLL_Reset(&fm,opll_type_ym2413);
|
||||
}
|
||||
if (dumpWrites) {
|
||||
addWrite(0xffffffff,0);
|
||||
}
|
||||
|
|
@ -625,6 +646,7 @@ void DivPlatformOPLL::reset() {
|
|||
|
||||
lastBusy=60;
|
||||
drumState=0;
|
||||
lastCustomMemory=-1;
|
||||
|
||||
drumVol[0]=0;
|
||||
drumVol[1]=0;
|
||||
|
|
|
|||
|
|
@ -35,7 +35,7 @@ class DivPlatformOPLL: public DivDispatch {
|
|||
unsigned char freqH, freqL;
|
||||
int freq, baseFreq, pitch, note;
|
||||
unsigned char ins;
|
||||
bool active, insChanged, freqChanged, keyOn, keyOff, drums, portaPause, furnaceDac, inPorta;
|
||||
bool active, insChanged, freqChanged, keyOn, keyOff, portaPause, furnaceDac, inPorta;
|
||||
int vol, outVol;
|
||||
unsigned char pan;
|
||||
Channel():
|
||||
|
|
@ -51,15 +51,14 @@ class DivPlatformOPLL: public DivDispatch {
|
|||
freqChanged(false),
|
||||
keyOn(false),
|
||||
keyOff(false),
|
||||
drums(false),
|
||||
portaPause(false),
|
||||
furnaceDac(false),
|
||||
inPorta(false),
|
||||
vol(0),
|
||||
pan(3) {}
|
||||
};
|
||||
Channel chan[9];
|
||||
bool isMuted[9];
|
||||
Channel chan[11];
|
||||
bool isMuted[11];
|
||||
struct QueuedWrite {
|
||||
unsigned short addr;
|
||||
unsigned char val;
|
||||
|
|
@ -68,7 +67,7 @@ class DivPlatformOPLL: public DivDispatch {
|
|||
};
|
||||
std::queue<QueuedWrite> writes;
|
||||
opll_t fm;
|
||||
int delay;
|
||||
int delay, lastCustomMemory;
|
||||
unsigned char lastBusy;
|
||||
unsigned char drumState;
|
||||
unsigned char drumVol[5];
|
||||
|
|
@ -76,6 +75,9 @@ class DivPlatformOPLL: public DivDispatch {
|
|||
unsigned char regPool[256];
|
||||
|
||||
bool useYMFM;
|
||||
bool drums;
|
||||
bool properDrums;
|
||||
bool vrc7;
|
||||
|
||||
short oldWrites[256];
|
||||
short pendingWrites[256];
|
||||
|
|
@ -102,6 +104,8 @@ class DivPlatformOPLL: public DivDispatch {
|
|||
bool keyOffAffectsArp(int ch);
|
||||
bool keyOffAffectsPorta(int ch);
|
||||
void toggleRegisterDump(bool enable);
|
||||
void setVRC7(bool vrc);
|
||||
void setProperDrums(bool pd);
|
||||
void setFlags(unsigned int flags);
|
||||
void notifyInsChange(int ins);
|
||||
void notifyInsDeletion(void* ins);
|
||||
|
|
|
|||
|
|
@ -226,4 +226,6 @@ void apu_turn_on(struct NESAPU* a, BYTE apu_type) {
|
|||
a->DMC.length = 1;
|
||||
a->DMC.address_start = 0xC000;
|
||||
a->apu.odd_cycle = 0;
|
||||
// come non viene inizializzato? Vorrei qualche spiegazione...
|
||||
a->r4011.frames = 0;
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue