2021-12-03 16:04:07 -05:00
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/*
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* Copyright (C) 2010-2019 Fabio Cavallo (aka FHorse)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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// additional modifications by tildearrow for furnace
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#include <string.h>
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#include "apu.h"
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2022-01-08 17:44:17 -05:00
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void apu_tick(struct NESAPU* a, BYTE *hwtick) {
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2021-12-03 16:04:07 -05:00
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/* sottraggo il numero di cicli eseguiti */
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2022-01-08 17:44:17 -05:00
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a->apu.cycles--;
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2021-12-03 16:04:07 -05:00
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/*
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* questo flag sara' a TRUE solo nel ciclo
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* in cui viene eseguito il length counter.
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*/
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2022-01-08 17:44:17 -05:00
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a->apu.length_clocked = FALSE;
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2021-12-03 16:04:07 -05:00
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/*
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* se e' settato il delay del $4017, essendo
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* questo il ciclo successivo, valorizzo il
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* registro.
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*/
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#if defined (VECCHIA_GESTIONE_JITTER)
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if (r4017.jitter.delay) {
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r4017.jitter.delay = FALSE;
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r4017_jitter();
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}
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#else
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2022-01-08 17:44:17 -05:00
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if (a->r4017.jitter.delay) {
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a->r4017.jitter.delay = FALSE;
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2021-12-03 16:04:07 -05:00
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r4017_jitter(0)
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}
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r4017_reset_frame()
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#endif
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/* quando apu.cycles e' a 0 devo eseguire uno step */
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2022-01-08 17:44:17 -05:00
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if (!a->apu.cycles) {
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switch (a->apu.step) {
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2021-12-03 16:04:07 -05:00
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case 0:
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/*
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* nel mode 1 devo eseguire il
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* length counter e lo sweep.
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*/
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2022-01-08 17:44:17 -05:00
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if (a->apu.mode == APU_48HZ) {
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length_clock()
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sweep_clock()
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}
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envelope_clock()
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/* triangle's linear counter */
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linear_clock()
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/* passo al prossimo step */
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apu_change_step(++a->apu.step);
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break;
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case 1:
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/* nel mode 0 devo eseguire il length counter */
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if (a->apu.mode == APU_60HZ) {
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2021-12-03 16:04:07 -05:00
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length_clock()
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sweep_clock()
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}
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envelope_clock()
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/* triangle's linear counter */
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linear_clock()
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/* passo al prossimo step */
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apu_change_step(++a->apu.step);
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break;
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case 2:
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/*
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* nel mode 1 devo eseguire il
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* length counter e lo sweep.
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*/
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2022-01-08 17:44:17 -05:00
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if (a->apu.mode == APU_48HZ) {
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length_clock()
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sweep_clock()
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}
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envelope_clock()
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/* triangle's linear counter */
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linear_clock()
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/* passo al prossimo step */
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apu_change_step(++a->apu.step);
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2021-12-03 16:04:07 -05:00
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break;
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case 3:
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/*
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* gli step 3, 4 e 5 settano il bit 6 del $4015
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* ma solo nel 4 genero un IRQ.
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*/
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2022-01-08 17:44:17 -05:00
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if (a->apu.mode == APU_60HZ) {
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2021-12-03 16:04:07 -05:00
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/*
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* se e' a 0 il bit 6 del $4017 (interrupt
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* inhibit flag) allora devo generare un IRQ.
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*/
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2022-01-08 17:44:17 -05:00
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if (!(a->r4017.value & 0x40)) {
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/* setto il bit 6 del $4015 */
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a->r4015.value |= 0x40;
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2021-12-03 16:04:07 -05:00
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}
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} else {
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/* nel mode 1 devo eseguire l'envelope */
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envelope_clock()
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/* triangle's linear counter */
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linear_clock()
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}
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/* passo al prossimo step */
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2022-01-08 17:44:17 -05:00
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apu_change_step(++a->apu.step);
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2021-12-03 16:04:07 -05:00
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break;
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case 4:
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/*
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* gli step 3, 4 e 5 settano il bit 6 del $4015
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* ma solo nel 4 genero un IRQ.
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*/
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2022-01-08 17:44:17 -05:00
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if (a->apu.mode == APU_60HZ) {
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2021-12-03 16:04:07 -05:00
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length_clock()
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sweep_clock()
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envelope_clock()
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/* triangle's linear counter */
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linear_clock()
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/*
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* se e' a 0 il bit 6 del $4017 (interrupt
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* inhibit flag) allora devo generare un IRQ.
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*/
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2022-01-08 17:44:17 -05:00
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if (!(a->r4017.value & 0x40)) {
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2021-12-03 16:04:07 -05:00
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/* setto il bit 6 del $4015 */
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2022-01-08 17:44:17 -05:00
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a->r4015.value |= 0x40;
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}
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}
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/* passo al prossimo step */
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2022-01-08 17:44:17 -05:00
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apu_change_step(++a->apu.step);
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2021-12-03 16:04:07 -05:00
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break;
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case 5:
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/*
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* gli step 3, 4 e 5 settano il bit 6 del $4015
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* ma solo nel 4 genero un IRQ.
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*/
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2022-01-08 17:44:17 -05:00
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if (a->apu.mode == APU_60HZ) {
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2021-12-03 16:04:07 -05:00
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/*
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* se e' a 0 il bit 6 del $4017 (interrupt
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* inhibit flag) allora devo generare un IRQ.
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*/
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2022-01-08 17:44:17 -05:00
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if (!(a->r4017.value & 0x40)) {
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2021-12-03 16:04:07 -05:00
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/* setto il bit 6 del $4015 */
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2022-01-08 17:44:17 -05:00
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a->r4015.value |= 0x40;
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2021-12-03 16:04:07 -05:00
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}
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2022-01-08 17:44:17 -05:00
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a->apu.step++;
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2021-12-03 16:04:07 -05:00
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} else {
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/* nel mode 1 devo ricominciare il ciclo */
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2022-01-08 17:44:17 -05:00
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a->apu.step = 0;
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2021-12-03 16:04:07 -05:00
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}
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/* passo al prossimo step */
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2022-01-08 17:44:17 -05:00
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apu_change_step(a->apu.step);
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2021-12-03 16:04:07 -05:00
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break;
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case 6:
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/* da qui ci passo solo nel mode 0 */
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envelope_clock()
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/* triangle's linear counter */
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linear_clock()
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/* questo e' il passaggio finale del mode 0 */
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2022-01-08 17:44:17 -05:00
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a->apu.step = 1;
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2021-12-03 16:04:07 -05:00
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/* passo al prossimo step */
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2022-01-08 17:44:17 -05:00
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apu_change_step(a->apu.step);
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2021-12-03 16:04:07 -05:00
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break;
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}
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}
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/*
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* eseguo un ticket per ogni canale
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* valorizzandone l'output.
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*/
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2022-04-06 01:34:12 -04:00
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square_tick(a->S1, 0, a->apu.clocked)
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square_tick(a->S2, 0, a->apu.clocked)
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2021-12-03 16:04:07 -05:00
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triangle_tick()
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noise_tick()
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dmc_tick()
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// TODO
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/*if (snd_apu_tick) {
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snd_apu_tick();
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}*/
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2022-01-08 17:44:17 -05:00
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a->r4011.cycles++;
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}
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2022-01-26 16:07:55 -05:00
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void apu_turn_on(struct NESAPU* a, BYTE apu_type) {
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memset(&a->apu, 0x00, sizeof(a->apu));
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memset(&a->r4015, 0x00, sizeof(a->r4015));
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memset(&a->r4017, 0x00, sizeof(a->r4017));
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/* azzero tutte le variabili interne dei canali */
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memset(&a->S1, 0x00, sizeof(a->S1));
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memset(&a->S2, 0x00, sizeof(a->S2));
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memset(&a->TR, 0x00, sizeof(a->TR));
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memset(&a->NS, 0x00, sizeof(a->NS));
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memset(&a->DMC, 0x00, sizeof(a->DMC));
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/* al reset e' sempre settato a 60Hz */
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a->apu.mode = APU_60HZ;
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2022-01-26 16:07:55 -05:00
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/* per favore non fatemi questo... e' terribile */
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a->apu.type = apu_type;
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apu_change_step(a->apu.step);
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/* valori iniziali dei vari canali */
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a->S1.frequency = 1;
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a->S1.sweep.delay = 1;
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a->S1.sweep.divider = 1;
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a->S2.frequency = 1;
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a->S2.sweep.delay = 1;
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a->S2.sweep.divider = 1;
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a->TR.frequency = 1;
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a->TR.sequencer = 0;
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a->NS.frequency = 1;
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a->NS.shift = 1;
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a->DMC.frequency = 1;
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a->DMC.empty = TRUE;
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a->DMC.silence = TRUE;
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a->DMC.counter_out = 8;
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2021-12-03 16:04:07 -05:00
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// sembra che l'address del DMC al power on dia valorizzato a 0xC000
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// e la lunghezza del sample sia settato a 1 byte.
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// http://forums.nesdev.com/viewtopic.php?f=3&t=18278
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2022-01-08 17:44:17 -05:00
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a->DMC.length = 1;
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a->DMC.address_start = 0xC000;
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a->apu.odd_cycle = 0;
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2022-03-01 02:38:19 -05:00
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// come non viene inizializzato? Vorrei qualche spiegazione...
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a->r4011.frames = 0;
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2021-12-03 16:04:07 -05:00
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}
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